CSCE 436/836 - Advanced Embedded Systems

Lesson Date Topic Reading Assigned Due
L1 Jan 23 Course Intro, entity and architecture, digital systems design 1.1-1.7 HW #1 BOC L2
L2 Jan 25 Digital Systems, hierarchical design, testbenches 2.1, 2.2.1, 2.2.2 HW #2 BOC L3
L3 Jan 27 Combinational elements, unsigned, constraints file, synthesis 3.5.4, 4.2.3, 4.3.1 HW #3 BOC L4
L4 Jan 30 VHDL Sequential elements - Mod 10 Counter 5.1, 5.2, 5.7, 5.8 HW #4 BOC L5
L5 Feb 1 Combinations of elements, gated & non-gated, lab intro 7.2 HW #5 BOC L6
L6 Feb 3 Lab1 - VGA Synchronization
L7 Feb 6 Lab1 - VGA Synchronization Gate Check 1 BOC L7
L8 Feb 8 Lab1 - VGA Synchronization Gate Check 2 BOC L8
L9 Feb 10 Lab1 - VGA Synchronization Lab1 Functionality COB L9
L10 Feb 13 Finite State Machines, FSM timing, The DAISY system 10.2.1, 10.3.2, 10.4, 10.6.1 Lab1 Write-up
HW #6
COB L10
BOC L11
L11 Feb 15 Datapath and Control: generics, design, BBB, find Min 11.1, 11.2, 14.4.2 HW #7 BOC L12
L12 Feb 17 Datapath and Control - timing, Keyboard example 11.5 HW #8 BOC L13
L13 Feb 20 Datapath and Control: BRAM Macro, 2-Line Handshake
L14 Feb 22 Lab2 - Data acquisition, storage and display Gate Check 1 COB L14
L15 Feb 24 Exam #1
L16 Feb 27 Lab2 - Data acquisition, storage and display Gate Check 2 BOC L16
L17 Mar 1 Lab2 - Data acquisition, storage and display Lab2 Functionality COB L17
L18 Mar 3 Soft CPU - "MicroBlaze" Lab2 Write-up
HW #9
COB L18
BOC L19
L19 Mar 6 Soft CPU - "MicroBlaze" + Custom IP HW #10 BOC L20
L20 Mar 8 Soft CPU - "MicroBlaze" + Custom IP w/ Interrupts HW #11 BOC L21
L21 Mar 10 Lab3 - O'scope control Final Project Ideas
Break Mar 13-17 Spring Break - no class
L22 Mar 20 Lab3 - O'scope control Gate Check 1 BOC L22
L23 Mar 22 Lab3 - O'scope control Gate Check 2 BOC L23
L24 Mar 24 Lab3 - O'scope control
L25 Mar 27 Direct Digital Synthesis: fixed point numbers & phase inc Lab3 Functionality COB L25
L26 Mar 29 Direct Digital Synthesis: Look-Up Table (LUT) Lab3 Write-up
Final Project Proposal - Draft
COB L26
BOC L27
L27 Mar 31 Digital Low Pass Filter: Filtering Design BOC L28
L28 Apr 3 Digital Low Pass Filter: Digital Filter in Theory Revised Final Project Proposal
HW #12
BOC L29
BOC L29
L29 Apr 5 Lab4 - Function generator Gate Check #1 EOC L29
L30 Apr 7 Lab4 - Function generator Gate Check #2 EOC L30
L31 Apr 10 Lab4 - Function generator Lab4 Functionality COB L31
L32 Apr 12 Asynchronous Design
FPGA fabric
Lab4 Write-up COB L32
L33 Apr 14 Exam #2
L34 Apr 17 Lab5 - Final Project
Milestone #1
Final Project Plan BOC L34
L35 Apr 19 Lab5 - Final Project
Milestone #1
L36 Apr 21 Lab5 - Final Project
Milestone #1
L37 Apr 24 Communication Skills (writing)
Lab5 - Final Project - Milestone #2
Milestone#1 BOC L37
L38 Apr 26 Lab5 - Final Project
Milestone #2
L39 Apr 28 Lab5 - Final Project
Milestone #2
L40 May 1 Communication Skills (speaking)
Lab5 - Final Project - Final push
Milestone#2 BOC L40
L41 May 3 Lab5 - Final Project
Final push
L42 May 5 Lab5 - Final Project
Final push
L43 May 8 Final Presentations Project Functionality and Presentations BOC L43
L44 May 10 Final Presentations Final Presentation BOC L43
L45 May 12 Final Presentations Project Write-up EOC L44