Exploring the Design Space of Bandwidth Estimation Methods

Using Packet Sequence Information

A large number of bandwidth estimation methods have been proposed and studied in the past two decades, due to the wide range of applications of bandwidth estimation. However, there is a fundamental problem with the current bandwidth estimation methods. Most of them need to accurately measure some packet time information at the packet receivers, such as the inter-arrival time between two consecutive packets. Highly inaccurate time measurement leads to significant bandwidth estimation error. But it is hard and sometimes impossible to accurately measure these packet time information in some network environments, such as emerging cloud computing networks. This is referred to as faulty receiver-side timestamping.

The reasons of faulty receiver-side timestamping are various software and hardware factors at the packet receivers, such as virtual machine scheduling (commonly used in cloud networks), and interrupt moderation (commonly used in highspeed network cards). These factors add additional non-trivial delay, which is unrelated to the network bandwidth, to packets at their receivers.

The goal of this project is to design and develop, for the first time, a novel class of sequence-based bandwidth comparison and estimation methods for network environments with faulty receiver-side timestamping. The proposed work is fundamentally different from the current time-based bandwidth estimation methods, because the proposed work is based on the packet sequence information at a receiver (i.e., the arriving order of packets) instead of the packet time information at the receiver (e.g., the exact arrival time of each packet).

Selected Publications:


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