Timing Analyzer report for DE2_NIOS_DEVICE_LED
Sun Apr 08 00:55:42 2007
Version 6.0 Build 178 04/27/2006 SJ Web Edition


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. Timing Analyzer Summary
  3. Timing Analyzer Settings
  4. Clock Settings Summary
  5. Clock Setup: 'SDRAM_PLL:PLL1|altpll:altpll_component|_clk1'
  6. Clock Setup: 'CLOCK_50'
  7. Clock Setup: 'altera_internal_jtag~TCKUTAP'
  8. Clock Hold: 'SDRAM_PLL:PLL1|altpll:altpll_component|_clk1'
  9. Clock Hold: 'CLOCK_50'
 10. tsu
 11. tco
 12. tpd
 13. th
 14. Ignored Timing Assignments
 15. Timing Analyzer Messages



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2006 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.



+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Timing Analyzer Summary                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                ;
+-------------------------------------------------------------+-----------+-----------------------------------+----------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------+----------------------------------------------+--------------+
; Type                                                        ; Slack     ; Required Time                     ; Actual Time                      ; From                                                                                                                                                                                   ; To                                                                                                                                                                                              ; From Clock                                   ; To Clock                                     ; Failed Paths ;
+-------------------------------------------------------------+-----------+-----------------------------------+----------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------+----------------------------------------------+--------------+
; Worst-case tsu                                              ; N/A       ; None                              ; 8.985 ns                         ; SRAM_DQ[5]                                                                                                                                                                             ; system_0:u0|cpu_0:the_cpu_0|d_readdata_d1[21]                                                                                                                                                   ; --                                           ; CLOCK_50                                     ; 0            ;
; Worst-case tco                                              ; N/A       ; None                              ; 15.302 ns                        ; I2C_AV_Config:u1|I2C_Controller:u0|SD_COUNTER[1]                                                                                                                                       ; I2C_SCLK                                                                                                                                                                                        ; CLOCK_50                                     ; --                                           ; 0            ;
; Worst-case tpd                                              ; N/A       ; None                              ; 8.809 ns                         ; AUD_DACLRCK                                                                                                                                                                            ; AUD_ADCLRCK                                                                                                                                                                                     ; --                                           ; --                                           ; 0            ;
; Worst-case th                                               ; N/A       ; None                              ; 1.643 ns                         ; altera_internal_jtag~TMSUTAP                                                                                                                                                           ; sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|tms_cnt[0]                                                                                                                       ; --                                           ; altera_internal_jtag~TCKUTAP                 ; 0            ;
; Clock Setup: 'SDRAM_PLL:PLL1|altpll:altpll_component|_clk1' ; 0.526 ns  ; 100.00 MHz ( period = 10.000 ns ) ; 105.55 MHz ( period = 9.474 ns ) ; system_0:u0|cpu_0:the_cpu_0|d_address[23]                                                                                                                                              ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_2[6]                                                                                                           ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0            ;
; Clock Setup: 'CLOCK_50'                                     ; 10.831 ns ; 50.00 MHz ( period = 20.000 ns )  ; 109.06 MHz ( period = 9.169 ns ) ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address                                                                                   ; system_0:u0|sdram_0:the_sdram_0|m_addr[5]                                                                                                                                                       ; CLOCK_50                                     ; CLOCK_50                                     ; 0            ;
; Clock Setup: 'altera_internal_jtag~TCKUTAP'                 ; N/A       ; None                              ; 139.55 MHz ( period = 7.166 ns ) ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                              ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[11] ; altera_internal_jtag~TCKUTAP                 ; altera_internal_jtag~TCKUTAP                 ; 0            ;
; Clock Hold: 'SDRAM_PLL:PLL1|altpll:altpll_component|_clk1'  ; 0.391 ns  ; 100.00 MHz ( period = 10.000 ns ) ; N/A                              ; system_0:u0|jtag_uart_0:the_jtag_uart_0|jtag_uart_0_scfifo_w:the_jtag_uart_0_scfifo_w|scfifo:wfifo|scfifo_1n21:auto_generated|a_dpfifo_8t21:dpfifo|a_fefifo_7cf:fifo_state|b_non_empty ; system_0:u0|jtag_uart_0:the_jtag_uart_0|jtag_uart_0_scfifo_w:the_jtag_uart_0_scfifo_w|scfifo:wfifo|scfifo_1n21:auto_generated|a_dpfifo_8t21:dpfifo|a_fefifo_7cf:fifo_state|b_non_empty          ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0            ;
; Clock Hold: 'CLOCK_50'                                      ; 0.391 ns  ; 50.00 MHz ( period = 20.000 ns )  ; N/A                              ; system_0:u0|sdram_0:the_sdram_0|i_cmd[3]                                                                                                                                               ; system_0:u0|sdram_0:the_sdram_0|i_cmd[3]                                                                                                                                                        ; CLOCK_50                                     ; CLOCK_50                                     ; 0            ;
; Total number of failed paths                                ;           ;                                   ;                                  ;                                                                                                                                                                                        ;                                                                                                                                                                                                 ;                                              ;                                              ; 0            ;
+-------------------------------------------------------------+-----------+-----------------------------------+----------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------+----------------------------------------------+--------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Timing Analyzer Settings                                                                                                                                                  ;
+-------------------------------------------------------+--------------------+------------------------+-------------------------+-------------------------------------------+
; Option                                                ; Setting            ; From                   ; To                      ; Entity Name                               ;
+-------------------------------------------------------+--------------------+------------------------+-------------------------+-------------------------------------------+
; Device Name                                           ; EP2C35F672C6       ;                        ;                         ;                                           ;
; Timing Models                                         ; Final              ;                        ;                         ;                                           ;
; Number of source nodes to report per destination node ; 10                 ;                        ;                         ;                                           ;
; Number of destination nodes to report                 ; 10                 ;                        ;                         ;                                           ;
; Number of paths to report                             ; 200                ;                        ;                         ;                                           ;
; Report Minimum Timing Checks                          ; Off                ;                        ;                         ;                                           ;
; Use Fast Timing Models                                ; Off                ;                        ;                         ;                                           ;
; Report IO Paths Separately                            ; Off                ;                        ;                         ;                                           ;
; Default hold multicycle                               ; Same As Multicycle ;                        ;                         ;                                           ;
; Cut paths between unrelated clock domains             ; On                 ;                        ;                         ;                                           ;
; Cut off read during write signal paths                ; On                 ;                        ;                         ;                                           ;
; Cut off feedback from I/O pins                        ; On                 ;                        ;                         ;                                           ;
; Report Combined Fast/Slow Timing                      ; Off                ;                        ;                         ;                                           ;
; Ignore Clock Settings                                 ; Off                ;                        ;                         ;                                           ;
; Analyze latches as synchronous elements               ; On                 ;                        ;                         ;                                           ;
; Enable Recovery/Removal analysis                      ; Off                ;                        ;                         ;                                           ;
; Enable Clock Latency                                  ; Off                ;                        ;                         ;                                           ;
; Use TimeQuest Timing Analyzer                         ; Off                ;                        ;                         ;                                           ;
; Clock Settings                                        ; Clock 50           ;                        ; CLOCK_50                ;                                           ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[0]       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[0]~reg0  ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[10]      ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[10]~reg0 ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[11]      ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[11]~reg0 ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[12]      ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[12]~reg0 ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[13]      ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[13]~reg0 ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[14]      ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[14]~reg0 ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[15]      ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[15]~reg0 ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[1]       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[1]~reg0  ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[2]       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[2]~reg0  ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[3]       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[3]~reg0  ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[4]       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[4]~reg0  ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[5]       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[5]~reg0  ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[6]       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[6]~reg0  ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[7]       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[7]~reg0  ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[8]       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[8]~reg0  ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[9]       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[9]~reg0  ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; slave_address_d1[10]   ; *                       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; slave_address_d1[11]   ; *                       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; slave_address_d1[12]   ; *                       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; slave_address_d1[13]   ; *                       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; slave_address_d1[14]   ; *                       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; slave_address_d1[15]   ; *                       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; slave_address_d1[16]   ; *                       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; slave_address_d1[17]   ; *                       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; slave_address_d1[18]   ; *                       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; slave_address_d1[19]   ; *                       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; slave_address_d1[1]    ; *                       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; slave_address_d1[20]   ; *                       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; slave_address_d1[21]   ; *                       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; slave_address_d1[22]   ; *                       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; slave_address_d1[2]    ; *                       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; slave_address_d1[3]    ; *                       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; slave_address_d1[4]    ; *                       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; slave_address_d1[5]    ; *                       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; slave_address_d1[6]    ; *                       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; slave_address_d1[7]    ; *                       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; slave_address_d1[8]    ; *                       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; slave_address_d1[9]    ; *                       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; slave_byteenable_d1[0] ; *                       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; slave_byteenable_d1[1] ; *                       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; slave_writedata_d1[0]  ; *                       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; slave_writedata_d1[10] ; *                       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; slave_writedata_d1[11] ; *                       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; slave_writedata_d1[12] ; *                       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; slave_writedata_d1[13] ; *                       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; slave_writedata_d1[14] ; *                       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; slave_writedata_d1[15] ; *                       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; slave_writedata_d1[1]  ; *                       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; slave_writedata_d1[2]  ; *                       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; slave_writedata_d1[3]  ; *                       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; slave_writedata_d1[4]  ; *                       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; slave_writedata_d1[5]  ; *                       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; slave_writedata_d1[6]  ; *                       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; slave_writedata_d1[7]  ; *                       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; slave_writedata_d1[8]  ; *                       ; clock_0                                   ;
; Cut Timing Path                                       ; On                 ; slave_writedata_d1[9]  ; *                       ; clock_0                                   ;
; Maximum Delay                                         ; 100ns              ;                        ; data_in_d1              ; clock_0_master_read_done_sync_module      ;
; Maximum Delay                                         ; 100ns              ;                        ; data_in_d1              ; clock_0_slave_read_request_sync_module    ;
; Maximum Delay                                         ; 100ns              ;                        ; data_in_d1              ; clock_0_slave_write_request_sync_module   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[0]       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[0]~reg0  ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[10]      ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[10]~reg0 ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[11]      ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[11]~reg0 ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[12]      ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[12]~reg0 ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[13]      ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[13]~reg0 ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[14]      ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[14]~reg0 ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[15]      ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[15]~reg0 ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[1]       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[1]~reg0  ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[2]       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[2]~reg0  ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[3]       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[3]~reg0  ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[4]       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[4]~reg0  ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[5]       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[5]~reg0  ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[6]       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[6]~reg0  ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[7]       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[7]~reg0  ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[8]       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[8]~reg0  ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[9]       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; *                      ; slave_readdata[9]~reg0  ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; slave_address_d1[10]   ; *                       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; slave_address_d1[11]   ; *                       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; slave_address_d1[12]   ; *                       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; slave_address_d1[13]   ; *                       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; slave_address_d1[14]   ; *                       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; slave_address_d1[15]   ; *                       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; slave_address_d1[16]   ; *                       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; slave_address_d1[17]   ; *                       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; slave_address_d1[18]   ; *                       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; slave_address_d1[19]   ; *                       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; slave_address_d1[1]    ; *                       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; slave_address_d1[20]   ; *                       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; slave_address_d1[21]   ; *                       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; slave_address_d1[22]   ; *                       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; slave_address_d1[2]    ; *                       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; slave_address_d1[3]    ; *                       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; slave_address_d1[4]    ; *                       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; slave_address_d1[5]    ; *                       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; slave_address_d1[6]    ; *                       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; slave_address_d1[7]    ; *                       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; slave_address_d1[8]    ; *                       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; slave_address_d1[9]    ; *                       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; slave_byteenable_d1[0] ; *                       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; slave_byteenable_d1[1] ; *                       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; slave_writedata_d1[0]  ; *                       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; slave_writedata_d1[10] ; *                       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; slave_writedata_d1[11] ; *                       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; slave_writedata_d1[12] ; *                       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; slave_writedata_d1[13] ; *                       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; slave_writedata_d1[14] ; *                       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; slave_writedata_d1[15] ; *                       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; slave_writedata_d1[1]  ; *                       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; slave_writedata_d1[2]  ; *                       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; slave_writedata_d1[3]  ; *                       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; slave_writedata_d1[4]  ; *                       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; slave_writedata_d1[5]  ; *                       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; slave_writedata_d1[6]  ; *                       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; slave_writedata_d1[7]  ; *                       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; slave_writedata_d1[8]  ; *                       ; clock_1                                   ;
; Cut Timing Path                                       ; On                 ; slave_writedata_d1[9]  ; *                       ; clock_1                                   ;
; Maximum Delay                                         ; 100ns              ;                        ; data_in_d1              ; clock_1_master_read_done_sync_module      ;
; Maximum Delay                                         ; 100ns              ;                        ; data_in_d1              ; clock_1_master_write_done_sync_module     ;
; Maximum Delay                                         ; 100ns              ;                        ; data_in_d1              ; clock_1_slave_read_request_sync_module    ;
; Maximum Delay                                         ; 100ns              ;                        ; data_in_d1              ; clock_1_slave_write_request_sync_module   ;
; Maximum Delay                                         ; 100ns              ;                        ; data_in_d1              ; system_0_reset_clk_50_domain_synch_module ;
; Maximum Delay                                         ; 100ns              ;                        ; data_in_d1              ; system_0_reset_clk_domain_synch_module    ;
+-------------------------------------------------------+--------------------+------------------------+-------------------------+-------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Settings Summary                                                                                                                                                                                               ;
+----------------------------------------------+--------------------+------------+------------------+---------------+--------------+----------+-----------------------+---------------------+-----------+--------------+
; Clock Node Name                              ; Clock Setting Name ; Type       ; Fmax Requirement ; Early Latency ; Late Latency ; Based on ; Multiply Base Fmax by ; Divide Base Fmax by ; Offset    ; Phase offset ;
+----------------------------------------------+--------------------+------------+------------------+---------------+--------------+----------+-----------------------+---------------------+-----------+--------------+
; SDRAM_PLL:PLL1|altpll:altpll_component|_clk0 ;                    ; PLL output ; 50.0 MHz         ; 0.000 ns      ; 0.000 ns     ; CLOCK_50 ; 1                     ; 1                   ; -5.358 ns ;              ;
; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ;                    ; PLL output ; 100.0 MHz        ; 0.000 ns      ; 0.000 ns     ; CLOCK_50 ; 2                     ; 1                   ; -2.358 ns ;              ;
; CLOCK_50                                     ; CLOCK_50           ; User Pin   ; 50.0 MHz         ; 0.000 ns      ; 0.000 ns     ; --       ; N/A                   ; N/A                 ; N/A       ;              ;
; altera_internal_jtag~TCKUTAP                 ;                    ; User Pin   ; None             ; 0.000 ns      ; 0.000 ns     ; --       ; N/A                   ; N/A                 ; N/A       ;              ;
; altera_internal_jtag~UPDATEUSER              ;                    ; User Pin   ; None             ; 0.000 ns      ; 0.000 ns     ; --       ; N/A                   ; N/A                 ; N/A       ;              ;
+----------------------------------------------+--------------------+------------+------------------+---------------+--------------+----------+-----------------------+---------------------+-----------+--------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'SDRAM_PLL:PLL1|altpll:altpll_component|_clk1'                                                                                                                                                                                                                                                                                                                                                                                                                               ;
+-----------------------------------------+-----------------------------------------------------+-------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------+----------------------------------------------+-----------------------------+---------------------------+-------------------------+
; Slack                                   ; Actual fmax (period)                                ; From                                      ; To                                                                                                                                                          ; From Clock                                   ; To Clock                                     ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-----------------------------------------+-----------------------------------------------------+-------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------+----------------------------------------------+-----------------------------+---------------------------+-------------------------+
; 0.526 ns                                ; 105.55 MHz ( period = 9.474 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_2[6]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.803 ns                  ; 9.277 ns                ;
; 0.532 ns                                ; 105.62 MHz ( period = 9.468 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_2[4]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.797 ns                  ; 9.265 ns                ;
; 0.532 ns                                ; 105.62 MHz ( period = 9.468 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_2[1]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.797 ns                  ; 9.265 ns                ;
; 0.536 ns                                ; 105.66 MHz ( period = 9.464 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_0[1]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.790 ns                  ; 9.254 ns                ;
; 0.558 ns                                ; 105.91 MHz ( period = 9.442 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_0[3]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.809 ns                  ; 9.251 ns                ;
; 0.558 ns                                ; 105.91 MHz ( period = 9.442 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_0[2]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.809 ns                  ; 9.251 ns                ;
; 0.567 ns                                ; 106.01 MHz ( period = 9.433 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_0[6]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.799 ns                  ; 9.232 ns                ;
; 0.567 ns                                ; 106.01 MHz ( period = 9.433 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_0[5]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.799 ns                  ; 9.232 ns                ;
; 0.568 ns                                ; 106.02 MHz ( period = 9.432 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[14]                                                                     ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.807 ns                  ; 9.239 ns                ;
; 0.568 ns                                ; 106.02 MHz ( period = 9.432 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[6]                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.807 ns                  ; 9.239 ns                ;
; 0.568 ns                                ; 106.02 MHz ( period = 9.432 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[4]                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.807 ns                  ; 9.239 ns                ;
; 0.568 ns                                ; 106.02 MHz ( period = 9.432 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[3]                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.807 ns                  ; 9.239 ns                ;
; 0.568 ns                                ; 106.02 MHz ( period = 9.432 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[2]                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.807 ns                  ; 9.239 ns                ;
; 0.572 ns                                ; 106.07 MHz ( period = 9.428 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[13]                                                                     ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.800 ns                  ; 9.228 ns                ;
; 0.572 ns                                ; 106.07 MHz ( period = 9.428 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[9]                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.800 ns                  ; 9.228 ns                ;
; 0.572 ns                                ; 106.07 MHz ( period = 9.428 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[7]                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.800 ns                  ; 9.228 ns                ;
; 0.572 ns                                ; 106.07 MHz ( period = 9.428 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[5]                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.800 ns                  ; 9.228 ns                ;
; 0.572 ns                                ; 106.07 MHz ( period = 9.428 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[1]                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.800 ns                  ; 9.228 ns                ;
; 0.593 ns                                ; 106.30 MHz ( period = 9.407 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[10]                                                                     ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.795 ns                  ; 9.202 ns                ;
; 0.593 ns                                ; 106.30 MHz ( period = 9.407 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[8]                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.795 ns                  ; 9.202 ns                ;
; 0.602 ns                                ; 106.41 MHz ( period = 9.398 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[15]                                                                     ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.781 ns                  ; 9.179 ns                ;
; 0.602 ns                                ; 106.41 MHz ( period = 9.398 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[0]                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.781 ns                  ; 9.179 ns                ;
; 0.622 ns                                ; 106.63 MHz ( period = 9.378 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[12]                                                                     ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.779 ns                  ; 9.157 ns                ;
; 0.622 ns                                ; 106.63 MHz ( period = 9.378 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[11]                                                                     ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.779 ns                  ; 9.157 ns                ;
; 0.632 ns                                ; 106.75 MHz ( period = 9.368 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|cpu_0_data_master_dbs_address[0]                                                             ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.792 ns                  ; 9.160 ns                ;
; 0.824 ns                                ; 108.98 MHz ( period = 9.176 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0:the_cpu_0|ic_fill_ap_offset[1]                                                                                                            ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.780 ns                  ; 8.956 ns                ;
; 0.838 ns                                ; 109.15 MHz ( period = 9.162 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_1[2]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.792 ns                  ; 8.954 ns                ;
; 0.838 ns                                ; 109.15 MHz ( period = 9.162 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_1[1]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.792 ns                  ; 8.954 ns                ;
; 0.838 ns                                ; 109.15 MHz ( period = 9.162 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_1[0]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.792 ns                  ; 8.954 ns                ;
; 0.874 ns                                ; 109.58 MHz ( period = 9.126 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_2[7]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.790 ns                  ; 8.916 ns                ;
; 0.874 ns                                ; 109.58 MHz ( period = 9.126 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_2[5]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.790 ns                  ; 8.916 ns                ;
; 0.874 ns                                ; 109.58 MHz ( period = 9.126 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_2[3]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.790 ns                  ; 8.916 ns                ;
; 0.874 ns                                ; 109.58 MHz ( period = 9.126 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_2[2]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.790 ns                  ; 8.916 ns                ;
; 0.874 ns                                ; 109.58 MHz ( period = 9.126 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_2[0]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.790 ns                  ; 8.916 ns                ;
; 0.907 ns                                ; 109.97 MHz ( period = 9.093 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle                                              ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.693 ns                  ; 8.786 ns                ;
; 0.907 ns                                ; 109.97 MHz ( period = 9.093 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle~_Duplicate_1                                 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.693 ns                  ; 8.786 ns                ;
; 0.907 ns                                ; 109.97 MHz ( period = 9.093 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle~_Duplicate_2                                 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.693 ns                  ; 8.786 ns                ;
; 0.907 ns                                ; 109.97 MHz ( period = 9.093 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle~_Duplicate_3                                 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.693 ns                  ; 8.786 ns                ;
; 0.914 ns                                ; 110.06 MHz ( period = 9.086 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle~_Duplicate_5                                 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.691 ns                  ; 8.777 ns                ;
; 0.914 ns                                ; 110.06 MHz ( period = 9.086 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle~_Duplicate_4                                 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.691 ns                  ; 8.777 ns                ;
; 0.933 ns                                ; 110.29 MHz ( period = 9.067 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_readn                                         ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.696 ns                  ; 8.763 ns                ;
; 0.956 ns                                ; 110.57 MHz ( period = 9.044 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0:the_cpu_0|ic_fill_ap_offset[1]                                                                                                            ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.780 ns                  ; 8.824 ns                ;
; 1.000 ns                                ; 111.11 MHz ( period = 9.000 ns )                    ; system_0:u0|cpu_0:the_cpu_0|E_src2[0]     ; system_0:u0|cpu_0:the_cpu_0|E_src2_reg[21]                                                                                                                  ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.789 ns                  ; 8.789 ns                ;
; 1.042 ns                                ; 111.63 MHz ( period = 8.958 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_0[7]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.791 ns                  ; 8.749 ns                ;
; 1.042 ns                                ; 111.63 MHz ( period = 8.958 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_0[4]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.791 ns                  ; 8.749 ns                ;
; 1.042 ns                                ; 111.63 MHz ( period = 8.958 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_0[0]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.791 ns                  ; 8.749 ns                ;
; 1.055 ns                                ; 111.79 MHz ( period = 8.945 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_1[7]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.791 ns                  ; 8.736 ns                ;
; 1.055 ns                                ; 111.79 MHz ( period = 8.945 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_1[6]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.791 ns                  ; 8.736 ns                ;
; 1.055 ns                                ; 111.79 MHz ( period = 8.945 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_1[5]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.791 ns                  ; 8.736 ns                ;
; 1.055 ns                                ; 111.79 MHz ( period = 8.945 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_1[4]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.791 ns                  ; 8.736 ns                ;
; 1.055 ns                                ; 111.79 MHz ( period = 8.945 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_1[3]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.791 ns                  ; 8.736 ns                ;
; 1.081 ns                                ; 112.12 MHz ( period = 8.919 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_2[6]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.803 ns                  ; 8.722 ns                ;
; 1.087 ns                                ; 112.20 MHz ( period = 8.913 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_2[4]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.797 ns                  ; 8.710 ns                ;
; 1.087 ns                                ; 112.20 MHz ( period = 8.913 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_2[1]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.797 ns                  ; 8.710 ns                ;
; 1.091 ns                                ; 112.25 MHz ( period = 8.909 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_0[1]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.790 ns                  ; 8.699 ns                ;
; 1.113 ns                                ; 112.52 MHz ( period = 8.887 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_0[3]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.809 ns                  ; 8.696 ns                ;
; 1.113 ns                                ; 112.52 MHz ( period = 8.887 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_0[2]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.809 ns                  ; 8.696 ns                ;
; 1.122 ns                                ; 112.64 MHz ( period = 8.878 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_0[6]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.799 ns                  ; 8.677 ns                ;
; 1.122 ns                                ; 112.64 MHz ( period = 8.878 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_0[5]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.799 ns                  ; 8.677 ns                ;
; 1.123 ns                                ; 112.65 MHz ( period = 8.877 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[14]                                                                     ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.807 ns                  ; 8.684 ns                ;
; 1.123 ns                                ; 112.65 MHz ( period = 8.877 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[6]                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.807 ns                  ; 8.684 ns                ;
; 1.123 ns                                ; 112.65 MHz ( period = 8.877 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[4]                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.807 ns                  ; 8.684 ns                ;
; 1.123 ns                                ; 112.65 MHz ( period = 8.877 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[3]                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.807 ns                  ; 8.684 ns                ;
; 1.123 ns                                ; 112.65 MHz ( period = 8.877 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[2]                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.807 ns                  ; 8.684 ns                ;
; 1.127 ns                                ; 112.70 MHz ( period = 8.873 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[13]                                                                     ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.800 ns                  ; 8.673 ns                ;
; 1.127 ns                                ; 112.70 MHz ( period = 8.873 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[9]                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.800 ns                  ; 8.673 ns                ;
; 1.127 ns                                ; 112.70 MHz ( period = 8.873 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[7]                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.800 ns                  ; 8.673 ns                ;
; 1.127 ns                                ; 112.70 MHz ( period = 8.873 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[5]                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.800 ns                  ; 8.673 ns                ;
; 1.127 ns                                ; 112.70 MHz ( period = 8.873 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[1]                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.800 ns                  ; 8.673 ns                ;
; 1.134 ns                                ; 112.79 MHz ( period = 8.866 ns )                    ; system_0:u0|cpu_0:the_cpu_0|E_src2[10]    ; system_0:u0|cpu_0:the_cpu_0|E_src2_reg[21]                                                                                                                  ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.775 ns                  ; 8.641 ns                ;
; 1.144 ns                                ; 112.92 MHz ( period = 8.856 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|cpu_0_data_master_dbs_address[1]                                                             ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.793 ns                  ; 8.649 ns                ;
; 1.148 ns                                ; 112.97 MHz ( period = 8.852 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[10]                                                                     ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.795 ns                  ; 8.647 ns                ;
; 1.148 ns                                ; 112.97 MHz ( period = 8.852 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[8]                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.795 ns                  ; 8.647 ns                ;
; 1.153 ns                                ; 113.03 MHz ( period = 8.847 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle~_Duplicate_6                                 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.691 ns                  ; 8.538 ns                ;
; 1.153 ns                                ; 113.03 MHz ( period = 8.847 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle~_Duplicate_7                                 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.691 ns                  ; 8.538 ns                ;
; 1.157 ns                                ; 113.08 MHz ( period = 8.843 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[15]                                                                     ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.781 ns                  ; 8.624 ns                ;
; 1.157 ns                                ; 113.08 MHz ( period = 8.843 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[0]                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.781 ns                  ; 8.624 ns                ;
; 1.177 ns                                ; 113.34 MHz ( period = 8.823 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[12]                                                                     ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.779 ns                  ; 8.602 ns                ;
; 1.177 ns                                ; 113.34 MHz ( period = 8.823 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[11]                                                                     ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.779 ns                  ; 8.602 ns                ;
; 1.187 ns                                ; 113.47 MHz ( period = 8.813 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|cpu_0_data_master_dbs_address[0]                                                             ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.792 ns                  ; 8.605 ns                ;
; 1.219 ns                                ; 113.88 MHz ( period = 8.781 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0:the_cpu_0|ic_fill_ap_cnt[0]                                                                                                               ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.775 ns                  ; 8.556 ns                ;
; 1.219 ns                                ; 113.88 MHz ( period = 8.781 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0:the_cpu_0|ic_fill_ap_cnt[1]                                                                                                               ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.775 ns                  ; 8.556 ns                ;
; 1.219 ns                                ; 113.88 MHz ( period = 8.781 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0:the_cpu_0|ic_fill_ap_cnt[2]                                                                                                               ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.775 ns                  ; 8.556 ns                ;
; 1.219 ns                                ; 113.88 MHz ( period = 8.781 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0:the_cpu_0|ic_fill_ap_cnt[3]                                                                                                               ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.775 ns                  ; 8.556 ns                ;
; 1.219 ns                                ; 113.88 MHz ( period = 8.781 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0:the_cpu_0|ic_fill_ap_offset[2]                                                                                                            ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.775 ns                  ; 8.556 ns                ;
; 1.219 ns                                ; 113.88 MHz ( period = 8.781 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0:the_cpu_0|ic_fill_ap_offset[0]                                                                                                            ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.775 ns                  ; 8.556 ns                ;
; 1.229 ns                                ; 114.01 MHz ( period = 8.771 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|last_cycle_cpu_0_instruction_master_granted_slave_cfi_flash_0_s1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.792 ns                  ; 8.563 ns                ;
; 1.229 ns                                ; 114.01 MHz ( period = 8.771 ns )                    ; system_0:u0|cpu_0:the_cpu_0|E_src1[0]     ; system_0:u0|cpu_0:the_cpu_0|E_src2_reg[21]                                                                                                                  ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.788 ns                  ; 8.559 ns                ;
; 1.247 ns                                ; 114.25 MHz ( period = 8.753 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[0]                                    ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.690 ns                  ; 8.443 ns                ;
; 1.272 ns                                ; 114.57 MHz ( period = 8.728 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|write_n_to_the_cfi_flash_0                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.696 ns                  ; 8.424 ns                ;
; 1.286 ns                                ; 114.76 MHz ( period = 8.714 ns )                    ; system_0:u0|cpu_0:the_cpu_0|E_src1[31]    ; system_0:u0|cpu_0:the_cpu_0|E_src1[0]                                                                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.783 ns                  ; 8.497 ns                ;
; 1.314 ns                                ; 115.13 MHz ( period = 8.686 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_avalon_slave_arb_share_counter[2]             ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.789 ns                  ; 8.475 ns                ;
; 1.314 ns                                ; 115.13 MHz ( period = 8.686 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_avalon_slave_arb_share_counter[1]             ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.789 ns                  ; 8.475 ns                ;
; 1.314 ns                                ; 115.13 MHz ( period = 8.686 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_avalon_slave_arb_share_counter[0]             ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.789 ns                  ; 8.475 ns                ;
; 1.325 ns                                ; 115.27 MHz ( period = 8.675 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[4]                                    ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.694 ns                  ; 8.369 ns                ;
; 1.351 ns                                ; 115.62 MHz ( period = 8.649 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0:the_cpu_0|ic_fill_ap_cnt[0]                                                                                                               ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.775 ns                  ; 8.424 ns                ;
; 1.351 ns                                ; 115.62 MHz ( period = 8.649 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0:the_cpu_0|ic_fill_ap_cnt[1]                                                                                                               ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.775 ns                  ; 8.424 ns                ;
; 1.351 ns                                ; 115.62 MHz ( period = 8.649 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0:the_cpu_0|ic_fill_ap_cnt[2]                                                                                                               ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.775 ns                  ; 8.424 ns                ;
; 1.351 ns                                ; 115.62 MHz ( period = 8.649 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0:the_cpu_0|ic_fill_ap_cnt[3]                                                                                                               ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.775 ns                  ; 8.424 ns                ;
; 1.351 ns                                ; 115.62 MHz ( period = 8.649 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0:the_cpu_0|ic_fill_ap_offset[2]                                                                                                            ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.775 ns                  ; 8.424 ns                ;
; 1.351 ns                                ; 115.62 MHz ( period = 8.649 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0:the_cpu_0|ic_fill_ap_offset[0]                                                                                                            ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.775 ns                  ; 8.424 ns                ;
; 1.354 ns                                ; 115.66 MHz ( period = 8.646 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|dbs_16_reg_segment_0[9]                                                        ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.778 ns                  ; 8.424 ns                ;
; 1.354 ns                                ; 115.66 MHz ( period = 8.646 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|dbs_16_reg_segment_0[6]                                                        ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.778 ns                  ; 8.424 ns                ;
; 1.354 ns                                ; 115.66 MHz ( period = 8.646 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|dbs_16_reg_segment_0[11]                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.778 ns                  ; 8.424 ns                ;
; 1.354 ns                                ; 115.66 MHz ( period = 8.646 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|dbs_16_reg_segment_0[8]                                                        ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.778 ns                  ; 8.424 ns                ;
; 1.354 ns                                ; 115.66 MHz ( period = 8.646 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|dbs_16_reg_segment_0[4]                                                        ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.778 ns                  ; 8.424 ns                ;
; 1.354 ns                                ; 115.66 MHz ( period = 8.646 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|dbs_16_reg_segment_0[15]                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.778 ns                  ; 8.424 ns                ;
; 1.354 ns                                ; 115.66 MHz ( period = 8.646 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|dbs_16_reg_segment_0[12]                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.778 ns                  ; 8.424 ns                ;
; 1.364 ns                                ; 115.79 MHz ( period = 8.636 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|dbs_16_reg_segment_0[1]                                                        ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.787 ns                  ; 8.423 ns                ;
; 1.366 ns                                ; 115.82 MHz ( period = 8.634 ns )                    ; system_0:u0|cpu_0:the_cpu_0|E_src1[1]     ; system_0:u0|cpu_0:the_cpu_0|E_src2_reg[21]                                                                                                                  ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.784 ns                  ; 8.418 ns                ;
; 1.373 ns                                ; 115.92 MHz ( period = 8.627 ns )                    ; system_0:u0|cpu_0:the_cpu_0|E_src2[11]    ; system_0:u0|cpu_0:the_cpu_0|E_src2_reg[21]                                                                                                                  ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.786 ns                  ; 8.413 ns                ;
; 1.373 ns                                ; 115.92 MHz ( period = 8.627 ns )                    ; system_0:u0|cpu_0:the_cpu_0|E_src2[3]     ; system_0:u0|cpu_0:the_cpu_0|E_src2_reg[21]                                                                                                                  ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.776 ns                  ; 8.403 ns                ;
; 1.380 ns                                ; 116.01 MHz ( period = 8.620 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[15]                                   ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.700 ns                  ; 8.320 ns                ;
; 1.380 ns                                ; 116.01 MHz ( period = 8.620 ns )                    ; system_0:u0|cpu_0:the_cpu_0|E_src2[2]     ; system_0:u0|cpu_0:the_cpu_0|E_src2_reg[21]                                                                                                                  ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.783 ns                  ; 8.403 ns                ;
; 1.393 ns                                ; 116.18 MHz ( period = 8.607 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_1[2]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.792 ns                  ; 8.399 ns                ;
; 1.393 ns                                ; 116.18 MHz ( period = 8.607 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_1[1]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.792 ns                  ; 8.399 ns                ;
; 1.393 ns                                ; 116.18 MHz ( period = 8.607 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_1[0]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.792 ns                  ; 8.399 ns                ;
; 1.402 ns                                ; 116.31 MHz ( period = 8.598 ns )                    ; system_0:u0|cpu_0:the_cpu_0|E_src1[31]    ; system_0:u0|cpu_0:the_cpu_0|E_src2_reg[0]                                                                                                                   ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.782 ns                  ; 8.380 ns                ;
; 1.411 ns                                ; 116.43 MHz ( period = 8.589 ns )                    ; system_0:u0|cpu_0:the_cpu_0|E_src1[3]     ; system_0:u0|cpu_0:the_cpu_0|E_src2_reg[21]                                                                                                                  ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.776 ns                  ; 8.365 ns                ;
; 1.423 ns                                ; 116.59 MHz ( period = 8.577 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[22] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_2[6]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.803 ns                  ; 8.380 ns                ;
; 1.427 ns                                ; 116.65 MHz ( period = 8.573 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0:the_cpu_0|i_readdata_d1[14]                                                                                                               ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.788 ns                  ; 8.361 ns                ;
; 1.429 ns                                ; 116.67 MHz ( period = 8.571 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_2[7]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.790 ns                  ; 8.361 ns                ;
; 1.429 ns                                ; 116.67 MHz ( period = 8.571 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_2[5]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.790 ns                  ; 8.361 ns                ;
; 1.429 ns                                ; 116.67 MHz ( period = 8.571 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[22] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_2[4]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.797 ns                  ; 8.368 ns                ;
; 1.429 ns                                ; 116.67 MHz ( period = 8.571 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_2[3]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.790 ns                  ; 8.361 ns                ;
; 1.429 ns                                ; 116.67 MHz ( period = 8.571 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_2[2]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.790 ns                  ; 8.361 ns                ;
; 1.429 ns                                ; 116.67 MHz ( period = 8.571 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[22] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_2[1]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.797 ns                  ; 8.368 ns                ;
; 1.429 ns                                ; 116.67 MHz ( period = 8.571 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_2[0]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.790 ns                  ; 8.361 ns                ;
; 1.433 ns                                ; 116.73 MHz ( period = 8.567 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[22] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_0[1]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.790 ns                  ; 8.357 ns                ;
; 1.440 ns                                ; 116.82 MHz ( period = 8.560 ns )                    ; system_0:u0|cpu_0:the_cpu_0|E_src2[4]     ; system_0:u0|cpu_0:the_cpu_0|E_src2_reg[21]                                                                                                                  ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.776 ns                  ; 8.336 ns                ;
; 1.440 ns                                ; 116.82 MHz ( period = 8.560 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0:the_cpu_0|i_readdata_d1[15]                                                                                                               ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.788 ns                  ; 8.348 ns                ;
; 1.442 ns                                ; 116.85 MHz ( period = 8.558 ns )                    ; system_0:u0|cpu_0:the_cpu_0|E_src2[9]     ; system_0:u0|cpu_0:the_cpu_0|E_src2_reg[21]                                                                                                                  ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.785 ns                  ; 8.343 ns                ;
; 1.446 ns                                ; 116.90 MHz ( period = 8.554 ns )                    ; system_0:u0|cpu_0:the_cpu_0|E_src1[4]     ; system_0:u0|cpu_0:the_cpu_0|E_src2_reg[21]                                                                                                                  ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.776 ns                  ; 8.330 ns                ;
; 1.455 ns                                ; 117.03 MHz ( period = 8.545 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[22] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_0[3]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.809 ns                  ; 8.354 ns                ;
; 1.455 ns                                ; 117.03 MHz ( period = 8.545 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[22] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_0[2]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.809 ns                  ; 8.354 ns                ;
; 1.457 ns                                ; 117.05 MHz ( period = 8.543 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[12]                                   ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.700 ns                  ; 8.243 ns                ;
; 1.460 ns                                ; 117.10 MHz ( period = 8.540 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[5]                                    ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.694 ns                  ; 8.234 ns                ;
; 1.464 ns                                ; 117.15 MHz ( period = 8.536 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[22] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_0[6]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.799 ns                  ; 8.335 ns                ;
; 1.464 ns                                ; 117.15 MHz ( period = 8.536 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[22] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_0[5]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.799 ns                  ; 8.335 ns                ;
; 1.465 ns                                ; 117.16 MHz ( period = 8.535 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[22] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[14]                                                                     ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.807 ns                  ; 8.342 ns                ;
; 1.465 ns                                ; 117.16 MHz ( period = 8.535 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[22] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[6]                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.807 ns                  ; 8.342 ns                ;
; 1.465 ns                                ; 117.16 MHz ( period = 8.535 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[22] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[4]                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.807 ns                  ; 8.342 ns                ;
; 1.465 ns                                ; 117.16 MHz ( period = 8.535 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[22] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[3]                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.807 ns                  ; 8.342 ns                ;
; 1.465 ns                                ; 117.16 MHz ( period = 8.535 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[22] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[2]                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.807 ns                  ; 8.342 ns                ;
; 1.469 ns                                ; 117.22 MHz ( period = 8.531 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[22] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[13]                                                                     ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.800 ns                  ; 8.331 ns                ;
; 1.469 ns                                ; 117.22 MHz ( period = 8.531 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[22] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[9]                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.800 ns                  ; 8.331 ns                ;
; 1.469 ns                                ; 117.22 MHz ( period = 8.531 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[22] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[7]                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.800 ns                  ; 8.331 ns                ;
; 1.469 ns                                ; 117.22 MHz ( period = 8.531 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[22] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[5]                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.800 ns                  ; 8.331 ns                ;
; 1.469 ns                                ; 117.22 MHz ( period = 8.531 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[22] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[1]                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.800 ns                  ; 8.331 ns                ;
; 1.472 ns                                ; 117.26 MHz ( period = 8.528 ns )                    ; system_0:u0|cpu_0:the_cpu_0|E_src2[21]    ; system_0:u0|cpu_0:the_cpu_0|E_src2_reg[21]                                                                                                                  ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.786 ns                  ; 8.314 ns                ;
; 1.488 ns                                ; 117.48 MHz ( period = 8.512 ns )                    ; system_0:u0|cpu_0:the_cpu_0|E_logic_op[0] ; system_0:u0|cpu_0:the_cpu_0|E_src1[0]                                                                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.779 ns                  ; 8.291 ns                ;
; 1.490 ns                                ; 117.51 MHz ( period = 8.510 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[22] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[10]                                                                     ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.795 ns                  ; 8.305 ns                ;
; 1.490 ns                                ; 117.51 MHz ( period = 8.510 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[22] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[8]                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.795 ns                  ; 8.305 ns                ;
; 1.496 ns                                ; 117.59 MHz ( period = 8.504 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0:the_cpu_0|i_readdata_d1[4]                                                                                                                ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.808 ns                  ; 8.312 ns                ;
; 1.499 ns                                ; 117.63 MHz ( period = 8.501 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[22] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[15]                                                                     ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.781 ns                  ; 8.282 ns                ;
; 1.499 ns                                ; 117.63 MHz ( period = 8.501 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[22] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[0]                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.781 ns                  ; 8.282 ns                ;
; 1.503 ns                                ; 117.69 MHz ( period = 8.497 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[2]                                    ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.690 ns                  ; 8.187 ns                ;
; 1.503 ns                                ; 117.69 MHz ( period = 8.497 ns )                    ; system_0:u0|cpu_0:the_cpu_0|E_src2[15]    ; system_0:u0|cpu_0:the_cpu_0|E_src2_reg[21]                                                                                                                  ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.780 ns                  ; 8.277 ns                ;
; 1.516 ns                                ; 117.87 MHz ( period = 8.484 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|cfi_flash_0_s1_wait_counter[1]                                   ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.797 ns                  ; 8.281 ns                ;
; 1.519 ns                                ; 117.91 MHz ( period = 8.481 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[22] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[12]                                                                     ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.779 ns                  ; 8.260 ns                ;
; 1.519 ns                                ; 117.91 MHz ( period = 8.481 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[22] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[11]                                                                     ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.779 ns                  ; 8.260 ns                ;
; 1.527 ns                                ; 118.02 MHz ( period = 8.473 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[1]                                    ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.690 ns                  ; 8.163 ns                ;
; 1.529 ns                                ; 118.05 MHz ( period = 8.471 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[22] ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|cpu_0_data_master_dbs_address[0]                                                             ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.792 ns                  ; 8.263 ns                ;
; 1.538 ns                                ; 118.18 MHz ( period = 8.462 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|dbs_16_reg_segment_0[10]                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.777 ns                  ; 8.239 ns                ;
; 1.538 ns                                ; 118.18 MHz ( period = 8.462 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|dbs_16_reg_segment_0[7]                                                        ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.777 ns                  ; 8.239 ns                ;
; 1.538 ns                                ; 118.18 MHz ( period = 8.462 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|dbs_16_reg_segment_0[5]                                                        ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.777 ns                  ; 8.239 ns                ;
; 1.538 ns                                ; 118.18 MHz ( period = 8.462 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|dbs_16_reg_segment_0[3]                                                        ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.777 ns                  ; 8.239 ns                ;
; 1.538 ns                                ; 118.18 MHz ( period = 8.462 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|dbs_16_reg_segment_0[2]                                                        ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.777 ns                  ; 8.239 ns                ;
; 1.538 ns                                ; 118.18 MHz ( period = 8.462 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|dbs_16_reg_segment_0[0]                                                        ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.777 ns                  ; 8.239 ns                ;
; 1.538 ns                                ; 118.18 MHz ( period = 8.462 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|dbs_16_reg_segment_0[14]                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.777 ns                  ; 8.239 ns                ;
; 1.538 ns                                ; 118.18 MHz ( period = 8.462 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|dbs_16_reg_segment_0[13]                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.777 ns                  ; 8.239 ns                ;
; 1.554 ns                                ; 118.40 MHz ( period = 8.446 ns )                    ; system_0:u0|cpu_0:the_cpu_0|E_src2[1]     ; system_0:u0|cpu_0:the_cpu_0|E_src2_reg[21]                                                                                                                  ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.787 ns                  ; 8.233 ns                ;
; 1.557 ns                                ; 118.44 MHz ( period = 8.443 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|cfi_flash_0_s1_wait_counter[2]                                   ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.797 ns                  ; 8.240 ns                ;
; 1.586 ns                                ; 118.85 MHz ( period = 8.414 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|dbs_16_reg_segment_0[9]                                                        ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.778 ns                  ; 8.192 ns                ;
; 1.586 ns                                ; 118.85 MHz ( period = 8.414 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|dbs_16_reg_segment_0[6]                                                        ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.778 ns                  ; 8.192 ns                ;
; 1.586 ns                                ; 118.85 MHz ( period = 8.414 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|dbs_16_reg_segment_0[11]                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.778 ns                  ; 8.192 ns                ;
; 1.586 ns                                ; 118.85 MHz ( period = 8.414 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|dbs_16_reg_segment_0[8]                                                        ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.778 ns                  ; 8.192 ns                ;
; 1.586 ns                                ; 118.85 MHz ( period = 8.414 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|dbs_16_reg_segment_0[4]                                                        ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.778 ns                  ; 8.192 ns                ;
; 1.586 ns                                ; 118.85 MHz ( period = 8.414 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|dbs_16_reg_segment_0[15]                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.778 ns                  ; 8.192 ns                ;
; 1.586 ns                                ; 118.85 MHz ( period = 8.414 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|dbs_16_reg_segment_0[12]                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.778 ns                  ; 8.192 ns                ;
; 1.594 ns                                ; 118.96 MHz ( period = 8.406 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0:the_cpu_0|i_readdata_d1[12]                                                                                                               ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.787 ns                  ; 8.193 ns                ;
; 1.596 ns                                ; 118.99 MHz ( period = 8.404 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|dbs_16_reg_segment_0[1]                                                        ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.787 ns                  ; 8.191 ns                ;
; 1.597 ns                                ; 119.01 MHz ( period = 8.403 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_0[7]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.791 ns                  ; 8.194 ns                ;
; 1.597 ns                                ; 119.01 MHz ( period = 8.403 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_0[4]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.791 ns                  ; 8.194 ns                ;
; 1.597 ns                                ; 119.01 MHz ( period = 8.403 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_0[0]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.791 ns                  ; 8.194 ns                ;
; 1.600 ns                                ; 119.05 MHz ( period = 8.400 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[8]                                    ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.697 ns                  ; 8.097 ns                ;
; 1.601 ns                                ; 119.06 MHz ( period = 8.399 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[14]                                   ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.700 ns                  ; 8.099 ns                ;
; 1.602 ns                                ; 119.08 MHz ( period = 8.398 ns )                    ; system_0:u0|cpu_0:the_cpu_0|E_src2[8]     ; system_0:u0|cpu_0:the_cpu_0|E_src2_reg[21]                                                                                                                  ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.780 ns                  ; 8.178 ns                ;
; 1.604 ns                                ; 119.10 MHz ( period = 8.396 ns )                    ; system_0:u0|cpu_0:the_cpu_0|E_logic_op[0] ; system_0:u0|cpu_0:the_cpu_0|E_src2_reg[0]                                                                                                                   ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.778 ns                  ; 8.174 ns                ;
; 1.609 ns                                ; 119.18 MHz ( period = 8.391 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0:the_cpu_0|i_readdata_d1[23]                                                                                                               ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.788 ns                  ; 8.179 ns                ;
; 1.610 ns                                ; 119.19 MHz ( period = 8.390 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_1[7]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.791 ns                  ; 8.181 ns                ;
; 1.610 ns                                ; 119.19 MHz ( period = 8.390 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_1[6]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.791 ns                  ; 8.181 ns                ;
; 1.610 ns                                ; 119.19 MHz ( period = 8.390 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_1[5]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.791 ns                  ; 8.181 ns                ;
; 1.610 ns                                ; 119.19 MHz ( period = 8.390 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_1[4]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.791 ns                  ; 8.181 ns                ;
; 1.610 ns                                ; 119.19 MHz ( period = 8.390 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_1[3]                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.791 ns                  ; 8.181 ns                ;
; 1.614 ns                                ; 119.25 MHz ( period = 8.386 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_address[23] ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[3]                                    ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.690 ns                  ; 8.076 ns                ;
; 1.617 ns                                ; 119.29 MHz ( period = 8.383 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|sram_0_avalon_slave_0_arbitrator:the_sram_0_avalon_slave_0|sram_0_avalon_slave_0_arb_share_counter[0]                                           ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.801 ns                  ; 8.184 ns                ;
; 1.617 ns                                ; 119.29 MHz ( period = 8.383 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|sram_0_avalon_slave_0_arbitrator:the_sram_0_avalon_slave_0|sram_0_avalon_slave_0_arb_share_counter[1]                                           ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.801 ns                  ; 8.184 ns                ;
; 1.617 ns                                ; 119.29 MHz ( period = 8.383 ns )                    ; system_0:u0|cpu_0:the_cpu_0|d_read        ; system_0:u0|sram_0_avalon_slave_0_arbitrator:the_sram_0_avalon_slave_0|sram_0_avalon_slave_0_arb_share_counter[2]                                           ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.801 ns                  ; 8.184 ns                ;
; 1.622 ns                                ; 119.36 MHz ( period = 8.378 ns )                    ; system_0:u0|cpu_0:the_cpu_0|E_src2[5]     ; system_0:u0|cpu_0:the_cpu_0|E_src2_reg[21]                                                                                                                  ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 10.000 ns                   ; 9.787 ns                  ; 8.165 ns                ;
; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ;                                           ;                                                                                                                                                             ;                                              ;                                              ;                             ;                           ;                         ;
+-----------------------------------------+-----------------------------------------------------+-------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------+----------------------------------------------+-----------------------------+---------------------------+-------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'CLOCK_50'                                                                                                                                                                                                                                                                                                                                             ;
+-----------------------------------------+-----------------------------------------------------+-------------------------------------------------------------------------------------------------------+-------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; Slack                                   ; Actual fmax (period)                                ; From                                                                                                  ; To                                              ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-----------------------------------------+-----------------------------------------------------+-------------------------------------------------------------------------------------------------------+-------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; 10.831 ns                               ; 109.06 MHz ( period = 9.169 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|m_addr[5]       ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.510 ns                 ; 8.679 ns                ;
; 10.841 ns                               ; 109.18 MHz ( period = 9.159 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|m_addr[5]       ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.495 ns                 ; 8.654 ns                ;
; 10.847 ns                               ; 109.25 MHz ( period = 9.153 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|active_addr[18] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.791 ns                 ; 8.944 ns                ;
; 10.847 ns                               ; 109.25 MHz ( period = 9.153 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|active_addr[12] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.791 ns                 ; 8.944 ns                ;
; 10.847 ns                               ; 109.25 MHz ( period = 9.153 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|active_addr[19] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.791 ns                 ; 8.944 ns                ;
; 10.857 ns                               ; 109.37 MHz ( period = 9.143 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|active_addr[18] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.776 ns                 ; 8.919 ns                ;
; 10.857 ns                               ; 109.37 MHz ( period = 9.143 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|active_addr[12] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.776 ns                 ; 8.919 ns                ;
; 10.857 ns                               ; 109.37 MHz ( period = 9.143 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|active_addr[19] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.776 ns                 ; 8.919 ns                ;
; 11.013 ns                               ; 111.27 MHz ( period = 8.987 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|m_addr[3]       ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.510 ns                 ; 8.497 ns                ;
; 11.023 ns                               ; 111.40 MHz ( period = 8.977 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|m_addr[3]       ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.495 ns                 ; 8.472 ns                ;
; 11.061 ns                               ; 111.87 MHz ( period = 8.939 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|active_addr[5]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.790 ns                 ; 8.729 ns                ;
; 11.061 ns                               ; 111.87 MHz ( period = 8.939 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|active_addr[4]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.790 ns                 ; 8.729 ns                ;
; 11.061 ns                               ; 111.87 MHz ( period = 8.939 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|active_addr[14] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.790 ns                 ; 8.729 ns                ;
; 11.061 ns                               ; 111.87 MHz ( period = 8.939 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|active_addr[13] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.790 ns                 ; 8.729 ns                ;
; 11.061 ns                               ; 111.87 MHz ( period = 8.939 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|active_addr[17] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.790 ns                 ; 8.729 ns                ;
; 11.061 ns                               ; 111.87 MHz ( period = 8.939 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|active_addr[10] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.790 ns                 ; 8.729 ns                ;
; 11.071 ns                               ; 111.99 MHz ( period = 8.929 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|active_addr[5]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.775 ns                 ; 8.704 ns                ;
; 11.071 ns                               ; 111.99 MHz ( period = 8.929 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|active_addr[4]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.775 ns                 ; 8.704 ns                ;
; 11.071 ns                               ; 111.99 MHz ( period = 8.929 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|active_addr[14] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.775 ns                 ; 8.704 ns                ;
; 11.071 ns                               ; 111.99 MHz ( period = 8.929 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|active_addr[13] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.775 ns                 ; 8.704 ns                ;
; 11.071 ns                               ; 111.99 MHz ( period = 8.929 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|active_addr[17] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.775 ns                 ; 8.704 ns                ;
; 11.071 ns                               ; 111.99 MHz ( period = 8.929 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|active_addr[10] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.775 ns                 ; 8.704 ns                ;
; 11.122 ns                               ; 112.64 MHz ( period = 8.878 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|active_dqm[1]   ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.791 ns                 ; 8.669 ns                ;
; 11.122 ns                               ; 112.64 MHz ( period = 8.878 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|active_dqm[0]   ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.791 ns                 ; 8.669 ns                ;
; 11.122 ns                               ; 112.64 MHz ( period = 8.878 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|active_addr[9]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.791 ns                 ; 8.669 ns                ;
; 11.122 ns                               ; 112.64 MHz ( period = 8.878 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|active_addr[8]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.791 ns                 ; 8.669 ns                ;
; 11.122 ns                               ; 112.64 MHz ( period = 8.878 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|active_addr[21] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.791 ns                 ; 8.669 ns                ;
; 11.132 ns                               ; 112.76 MHz ( period = 8.868 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|active_dqm[1]   ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.776 ns                 ; 8.644 ns                ;
; 11.132 ns                               ; 112.76 MHz ( period = 8.868 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|active_dqm[0]   ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.776 ns                 ; 8.644 ns                ;
; 11.132 ns                               ; 112.76 MHz ( period = 8.868 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|active_addr[9]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.776 ns                 ; 8.644 ns                ;
; 11.132 ns                               ; 112.76 MHz ( period = 8.868 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|active_addr[8]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.776 ns                 ; 8.644 ns                ;
; 11.132 ns                               ; 112.76 MHz ( period = 8.868 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|active_addr[21] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.776 ns                 ; 8.644 ns                ;
; 11.157 ns                               ; 113.08 MHz ( period = 8.843 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|m_addr[0]       ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.519 ns                 ; 8.362 ns                ;
; 11.167 ns                               ; 113.21 MHz ( period = 8.833 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|m_addr[0]       ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.504 ns                 ; 8.337 ns                ;
; 11.186 ns                               ; 113.46 MHz ( period = 8.814 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[27] ; system_0:u0|sdram_0:the_sdram_0|m_addr[5]       ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.504 ns                 ; 8.318 ns                ;
; 11.202 ns                               ; 113.66 MHz ( period = 8.798 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[27] ; system_0:u0|sdram_0:the_sdram_0|active_addr[18] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.785 ns                 ; 8.583 ns                ;
; 11.202 ns                               ; 113.66 MHz ( period = 8.798 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[27] ; system_0:u0|sdram_0:the_sdram_0|active_addr[12] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.785 ns                 ; 8.583 ns                ;
; 11.202 ns                               ; 113.66 MHz ( period = 8.798 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[27] ; system_0:u0|sdram_0:the_sdram_0|active_addr[19] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.785 ns                 ; 8.583 ns                ;
; 11.220 ns                               ; 113.90 MHz ( period = 8.780 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|m_addr[1]       ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.519 ns                 ; 8.299 ns                ;
; 11.230 ns                               ; 114.03 MHz ( period = 8.770 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|m_addr[1]       ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.504 ns                 ; 8.274 ns                ;
; 11.260 ns                               ; 114.42 MHz ( period = 8.740 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|active_addr[6]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.788 ns                 ; 8.528 ns                ;
; 11.260 ns                               ; 114.42 MHz ( period = 8.740 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|active_addr[3]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.788 ns                 ; 8.528 ns                ;
; 11.260 ns                               ; 114.42 MHz ( period = 8.740 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|active_addr[2]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.788 ns                 ; 8.528 ns                ;
; 11.260 ns                               ; 114.42 MHz ( period = 8.740 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|active_addr[0]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.788 ns                 ; 8.528 ns                ;
; 11.260 ns                               ; 114.42 MHz ( period = 8.740 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|active_addr[11] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.788 ns                 ; 8.528 ns                ;
; 11.260 ns                               ; 114.42 MHz ( period = 8.740 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|active_addr[16] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.788 ns                 ; 8.528 ns                ;
; 11.260 ns                               ; 114.42 MHz ( period = 8.740 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|active_addr[15] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.788 ns                 ; 8.528 ns                ;
; 11.270 ns                               ; 114.55 MHz ( period = 8.730 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|active_addr[6]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.773 ns                 ; 8.503 ns                ;
; 11.270 ns                               ; 114.55 MHz ( period = 8.730 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|active_addr[3]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.773 ns                 ; 8.503 ns                ;
; 11.270 ns                               ; 114.55 MHz ( period = 8.730 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|active_addr[2]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.773 ns                 ; 8.503 ns                ;
; 11.270 ns                               ; 114.55 MHz ( period = 8.730 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|active_addr[0]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.773 ns                 ; 8.503 ns                ;
; 11.270 ns                               ; 114.55 MHz ( period = 8.730 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|active_addr[11] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.773 ns                 ; 8.503 ns                ;
; 11.270 ns                               ; 114.55 MHz ( period = 8.730 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|active_addr[16] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.773 ns                 ; 8.503 ns                ;
; 11.270 ns                               ; 114.55 MHz ( period = 8.730 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|active_addr[15] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.773 ns                 ; 8.503 ns                ;
; 11.314 ns                               ; 115.13 MHz ( period = 8.686 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|m_addr[2]       ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.519 ns                 ; 8.205 ns                ;
; 11.324 ns                               ; 115.26 MHz ( period = 8.676 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|m_addr[2]       ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.504 ns                 ; 8.180 ns                ;
; 11.329 ns                               ; 115.33 MHz ( period = 8.671 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|active_data[6]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.806 ns                 ; 8.477 ns                ;
; 11.329 ns                               ; 115.33 MHz ( period = 8.671 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|active_data[9]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.806 ns                 ; 8.477 ns                ;
; 11.329 ns                               ; 115.33 MHz ( period = 8.671 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|active_data[7]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.806 ns                 ; 8.477 ns                ;
; 11.329 ns                               ; 115.33 MHz ( period = 8.671 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|active_data[4]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.806 ns                 ; 8.477 ns                ;
; 11.329 ns                               ; 115.33 MHz ( period = 8.671 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|active_data[10] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.806 ns                 ; 8.477 ns                ;
; 11.329 ns                               ; 115.33 MHz ( period = 8.671 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|active_data[8]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.806 ns                 ; 8.477 ns                ;
; 11.339 ns                               ; 115.46 MHz ( period = 8.661 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|active_data[6]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.791 ns                 ; 8.452 ns                ;
; 11.339 ns                               ; 115.46 MHz ( period = 8.661 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|active_data[9]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.791 ns                 ; 8.452 ns                ;
; 11.339 ns                               ; 115.46 MHz ( period = 8.661 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|active_data[7]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.791 ns                 ; 8.452 ns                ;
; 11.339 ns                               ; 115.46 MHz ( period = 8.661 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|active_data[4]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.791 ns                 ; 8.452 ns                ;
; 11.339 ns                               ; 115.46 MHz ( period = 8.661 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|active_data[10] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.791 ns                 ; 8.452 ns                ;
; 11.339 ns                               ; 115.46 MHz ( period = 8.661 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|active_data[8]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.791 ns                 ; 8.452 ns                ;
; 11.344 ns                               ; 115.53 MHz ( period = 8.656 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|active_addr[1]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.804 ns                 ; 8.460 ns                ;
; 11.344 ns                               ; 115.53 MHz ( period = 8.656 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|active_data[5]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.804 ns                 ; 8.460 ns                ;
; 11.344 ns                               ; 115.53 MHz ( period = 8.656 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|active_data[15] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.804 ns                 ; 8.460 ns                ;
; 11.344 ns                               ; 115.53 MHz ( period = 8.656 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|active_data[14] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.804 ns                 ; 8.460 ns                ;
; 11.344 ns                               ; 115.53 MHz ( period = 8.656 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|active_data[12] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.804 ns                 ; 8.460 ns                ;
; 11.344 ns                               ; 115.53 MHz ( period = 8.656 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|active_data[13] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.804 ns                 ; 8.460 ns                ;
; 11.354 ns                               ; 115.66 MHz ( period = 8.646 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|active_addr[1]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.789 ns                 ; 8.435 ns                ;
; 11.354 ns                               ; 115.66 MHz ( period = 8.646 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|active_data[5]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.789 ns                 ; 8.435 ns                ;
; 11.354 ns                               ; 115.66 MHz ( period = 8.646 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|active_data[15] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.789 ns                 ; 8.435 ns                ;
; 11.354 ns                               ; 115.66 MHz ( period = 8.646 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|active_data[14] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.789 ns                 ; 8.435 ns                ;
; 11.354 ns                               ; 115.66 MHz ( period = 8.646 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|active_data[12] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.789 ns                 ; 8.435 ns                ;
; 11.354 ns                               ; 115.66 MHz ( period = 8.646 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|active_data[13] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.789 ns                 ; 8.435 ns                ;
; 11.368 ns                               ; 115.85 MHz ( period = 8.632 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[27] ; system_0:u0|sdram_0:the_sdram_0|m_addr[3]       ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.504 ns                 ; 8.136 ns                ;
; 11.377 ns                               ; 115.97 MHz ( period = 8.623 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[33] ; system_0:u0|sdram_0:the_sdram_0|m_addr[5]       ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.504 ns                 ; 8.127 ns                ;
; 11.379 ns                               ; 116.00 MHz ( period = 8.621 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|active_addr[7]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.801 ns                 ; 8.422 ns                ;
; 11.379 ns                               ; 116.00 MHz ( period = 8.621 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|active_data[0]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.801 ns                 ; 8.422 ns                ;
; 11.379 ns                               ; 116.00 MHz ( period = 8.621 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|active_rnw      ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.801 ns                 ; 8.422 ns                ;
; 11.379 ns                               ; 116.00 MHz ( period = 8.621 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|active_addr[20] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.801 ns                 ; 8.422 ns                ;
; 11.389 ns                               ; 116.13 MHz ( period = 8.611 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|active_addr[7]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.786 ns                 ; 8.397 ns                ;
; 11.389 ns                               ; 116.13 MHz ( period = 8.611 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|active_data[0]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.786 ns                 ; 8.397 ns                ;
; 11.389 ns                               ; 116.13 MHz ( period = 8.611 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|active_rnw      ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.786 ns                 ; 8.397 ns                ;
; 11.389 ns                               ; 116.13 MHz ( period = 8.611 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|active_addr[20] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.786 ns                 ; 8.397 ns                ;
; 11.393 ns                               ; 116.18 MHz ( period = 8.607 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[33] ; system_0:u0|sdram_0:the_sdram_0|active_addr[18] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.785 ns                 ; 8.392 ns                ;
; 11.393 ns                               ; 116.18 MHz ( period = 8.607 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[33] ; system_0:u0|sdram_0:the_sdram_0|active_addr[12] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.785 ns                 ; 8.392 ns                ;
; 11.393 ns                               ; 116.18 MHz ( period = 8.607 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[33] ; system_0:u0|sdram_0:the_sdram_0|active_addr[19] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.785 ns                 ; 8.392 ns                ;
; 11.416 ns                               ; 116.50 MHz ( period = 8.584 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[27] ; system_0:u0|sdram_0:the_sdram_0|active_addr[5]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.784 ns                 ; 8.368 ns                ;
; 11.416 ns                               ; 116.50 MHz ( period = 8.584 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[27] ; system_0:u0|sdram_0:the_sdram_0|active_addr[4]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.784 ns                 ; 8.368 ns                ;
; 11.416 ns                               ; 116.50 MHz ( period = 8.584 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[27] ; system_0:u0|sdram_0:the_sdram_0|active_addr[14] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.784 ns                 ; 8.368 ns                ;
; 11.416 ns                               ; 116.50 MHz ( period = 8.584 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[27] ; system_0:u0|sdram_0:the_sdram_0|active_addr[13] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.784 ns                 ; 8.368 ns                ;
; 11.416 ns                               ; 116.50 MHz ( period = 8.584 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[27] ; system_0:u0|sdram_0:the_sdram_0|active_addr[17] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.784 ns                 ; 8.368 ns                ;
; 11.416 ns                               ; 116.50 MHz ( period = 8.584 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[27] ; system_0:u0|sdram_0:the_sdram_0|active_addr[10] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.784 ns                 ; 8.368 ns                ;
; 11.463 ns                               ; 117.14 MHz ( period = 8.537 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[33] ; system_0:u0|sdram_0:the_sdram_0|m_addr[5]       ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.504 ns                 ; 8.041 ns                ;
; 11.467 ns                               ; 117.19 MHz ( period = 8.533 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|m_addr[6]       ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.510 ns                 ; 8.043 ns                ;
; 11.477 ns                               ; 117.33 MHz ( period = 8.523 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|m_addr[6]       ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.495 ns                 ; 8.018 ns                ;
; 11.477 ns                               ; 117.33 MHz ( period = 8.523 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[27] ; system_0:u0|sdram_0:the_sdram_0|active_dqm[1]   ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.785 ns                 ; 8.308 ns                ;
; 11.477 ns                               ; 117.33 MHz ( period = 8.523 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[27] ; system_0:u0|sdram_0:the_sdram_0|active_dqm[0]   ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.785 ns                 ; 8.308 ns                ;
; 11.477 ns                               ; 117.33 MHz ( period = 8.523 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[27] ; system_0:u0|sdram_0:the_sdram_0|active_addr[9]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.785 ns                 ; 8.308 ns                ;
; 11.477 ns                               ; 117.33 MHz ( period = 8.523 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[27] ; system_0:u0|sdram_0:the_sdram_0|active_addr[8]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.785 ns                 ; 8.308 ns                ;
; 11.477 ns                               ; 117.33 MHz ( period = 8.523 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[27] ; system_0:u0|sdram_0:the_sdram_0|active_addr[21] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.785 ns                 ; 8.308 ns                ;
; 11.479 ns                               ; 117.36 MHz ( period = 8.521 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[33] ; system_0:u0|sdram_0:the_sdram_0|active_addr[18] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.785 ns                 ; 8.306 ns                ;
; 11.479 ns                               ; 117.36 MHz ( period = 8.521 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[33] ; system_0:u0|sdram_0:the_sdram_0|active_addr[12] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.785 ns                 ; 8.306 ns                ;
; 11.479 ns                               ; 117.36 MHz ( period = 8.521 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[33] ; system_0:u0|sdram_0:the_sdram_0|active_addr[19] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.785 ns                 ; 8.306 ns                ;
; 11.512 ns                               ; 117.81 MHz ( period = 8.488 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[27] ; system_0:u0|sdram_0:the_sdram_0|m_addr[0]       ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.513 ns                 ; 8.001 ns                ;
; 11.515 ns                               ; 117.86 MHz ( period = 8.485 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|m_bank[1]       ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.558 ns                 ; 8.043 ns                ;
; 11.524 ns                               ; 117.98 MHz ( period = 8.476 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|m_bank[1]       ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.543 ns                 ; 8.019 ns                ;
; 11.558 ns                               ; 118.46 MHz ( period = 8.442 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[38] ; system_0:u0|sdram_0:the_sdram_0|m_addr[5]       ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.515 ns                 ; 7.957 ns                ;
; 11.559 ns                               ; 118.47 MHz ( period = 8.441 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[33] ; system_0:u0|sdram_0:the_sdram_0|m_addr[3]       ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.504 ns                 ; 7.945 ns                ;
; 11.574 ns                               ; 118.68 MHz ( period = 8.426 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[38] ; system_0:u0|sdram_0:the_sdram_0|active_addr[18] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.796 ns                 ; 8.222 ns                ;
; 11.574 ns                               ; 118.68 MHz ( period = 8.426 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[38] ; system_0:u0|sdram_0:the_sdram_0|active_addr[12] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.796 ns                 ; 8.222 ns                ;
; 11.574 ns                               ; 118.68 MHz ( period = 8.426 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[38] ; system_0:u0|sdram_0:the_sdram_0|active_addr[19] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.796 ns                 ; 8.222 ns                ;
; 11.575 ns                               ; 118.69 MHz ( period = 8.425 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[27] ; system_0:u0|sdram_0:the_sdram_0|m_addr[1]       ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.513 ns                 ; 7.938 ns                ;
; 11.577 ns                               ; 118.72 MHz ( period = 8.423 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|m_bank[0]       ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.558 ns                 ; 7.981 ns                ;
; 11.586 ns                               ; 118.85 MHz ( period = 8.414 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|m_bank[0]       ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.543 ns                 ; 7.957 ns                ;
; 11.589 ns                               ; 118.89 MHz ( period = 8.411 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[29] ; system_0:u0|sdram_0:the_sdram_0|m_addr[5]       ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.507 ns                 ; 7.918 ns                ;
; 11.602 ns                               ; 119.08 MHz ( period = 8.398 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|active_data[3]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.798 ns                 ; 8.196 ns                ;
; 11.602 ns                               ; 119.08 MHz ( period = 8.398 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|active_data[2]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.798 ns                 ; 8.196 ns                ;
; 11.602 ns                               ; 119.08 MHz ( period = 8.398 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|active_data[1]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.798 ns                 ; 8.196 ns                ;
; 11.602 ns                               ; 119.08 MHz ( period = 8.398 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|active_data[11] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.798 ns                 ; 8.196 ns                ;
; 11.605 ns                               ; 119.12 MHz ( period = 8.395 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[29] ; system_0:u0|sdram_0:the_sdram_0|active_addr[18] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.788 ns                 ; 8.183 ns                ;
; 11.605 ns                               ; 119.12 MHz ( period = 8.395 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[29] ; system_0:u0|sdram_0:the_sdram_0|active_addr[12] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.788 ns                 ; 8.183 ns                ;
; 11.605 ns                               ; 119.12 MHz ( period = 8.395 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[29] ; system_0:u0|sdram_0:the_sdram_0|active_addr[19] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.788 ns                 ; 8.183 ns                ;
; 11.607 ns                               ; 119.15 MHz ( period = 8.393 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[33] ; system_0:u0|sdram_0:the_sdram_0|active_addr[5]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.784 ns                 ; 8.177 ns                ;
; 11.607 ns                               ; 119.15 MHz ( period = 8.393 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[33] ; system_0:u0|sdram_0:the_sdram_0|active_addr[4]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.784 ns                 ; 8.177 ns                ;
; 11.607 ns                               ; 119.15 MHz ( period = 8.393 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[33] ; system_0:u0|sdram_0:the_sdram_0|active_addr[14] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.784 ns                 ; 8.177 ns                ;
; 11.607 ns                               ; 119.15 MHz ( period = 8.393 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[33] ; system_0:u0|sdram_0:the_sdram_0|active_addr[13] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.784 ns                 ; 8.177 ns                ;
; 11.607 ns                               ; 119.15 MHz ( period = 8.393 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[33] ; system_0:u0|sdram_0:the_sdram_0|active_addr[17] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.784 ns                 ; 8.177 ns                ;
; 11.607 ns                               ; 119.15 MHz ( period = 8.393 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[33] ; system_0:u0|sdram_0:the_sdram_0|active_addr[10] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.784 ns                 ; 8.177 ns                ;
; 11.612 ns                               ; 119.22 MHz ( period = 8.388 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|active_data[3]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.783 ns                 ; 8.171 ns                ;
; 11.612 ns                               ; 119.22 MHz ( period = 8.388 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|active_data[2]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.783 ns                 ; 8.171 ns                ;
; 11.612 ns                               ; 119.22 MHz ( period = 8.388 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|active_data[1]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.783 ns                 ; 8.171 ns                ;
; 11.612 ns                               ; 119.22 MHz ( period = 8.388 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|active_data[11] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.783 ns                 ; 8.171 ns                ;
; 11.615 ns                               ; 119.26 MHz ( period = 8.385 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[27] ; system_0:u0|sdram_0:the_sdram_0|active_addr[6]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.782 ns                 ; 8.167 ns                ;
; 11.615 ns                               ; 119.26 MHz ( period = 8.385 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[27] ; system_0:u0|sdram_0:the_sdram_0|active_addr[3]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.782 ns                 ; 8.167 ns                ;
; 11.615 ns                               ; 119.26 MHz ( period = 8.385 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[27] ; system_0:u0|sdram_0:the_sdram_0|active_addr[2]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.782 ns                 ; 8.167 ns                ;
; 11.615 ns                               ; 119.26 MHz ( period = 8.385 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[27] ; system_0:u0|sdram_0:the_sdram_0|active_addr[0]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.782 ns                 ; 8.167 ns                ;
; 11.615 ns                               ; 119.26 MHz ( period = 8.385 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[27] ; system_0:u0|sdram_0:the_sdram_0|active_addr[11] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.782 ns                 ; 8.167 ns                ;
; 11.615 ns                               ; 119.26 MHz ( period = 8.385 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[27] ; system_0:u0|sdram_0:the_sdram_0|active_addr[16] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.782 ns                 ; 8.167 ns                ;
; 11.615 ns                               ; 119.26 MHz ( period = 8.385 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[27] ; system_0:u0|sdram_0:the_sdram_0|active_addr[15] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.782 ns                 ; 8.167 ns                ;
; 11.645 ns                               ; 119.69 MHz ( period = 8.355 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[33] ; system_0:u0|sdram_0:the_sdram_0|m_addr[3]       ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.504 ns                 ; 7.859 ns                ;
; 11.647 ns                               ; 119.72 MHz ( period = 8.353 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[28] ; system_0:u0|sdram_0:the_sdram_0|m_addr[5]       ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.504 ns                 ; 7.857 ns                ;
; 11.652 ns                               ; 119.79 MHz ( period = 8.348 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[26] ; system_0:u0|sdram_0:the_sdram_0|m_addr[5]       ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.514 ns                 ; 7.862 ns                ;
; 11.656 ns                               ; 119.85 MHz ( period = 8.344 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[30] ; system_0:u0|sdram_0:the_sdram_0|m_addr[5]       ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.505 ns                 ; 7.849 ns                ;
; 11.659 ns                               ; 119.89 MHz ( period = 8.341 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|m_dqm[0]        ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.554 ns                 ; 7.895 ns                ;
; 11.663 ns                               ; 119.95 MHz ( period = 8.337 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[28] ; system_0:u0|sdram_0:the_sdram_0|active_addr[18] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.785 ns                 ; 8.122 ns                ;
; 11.663 ns                               ; 119.95 MHz ( period = 8.337 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[28] ; system_0:u0|sdram_0:the_sdram_0|active_addr[12] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.785 ns                 ; 8.122 ns                ;
; 11.663 ns                               ; 119.95 MHz ( period = 8.337 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[28] ; system_0:u0|sdram_0:the_sdram_0|active_addr[19] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.785 ns                 ; 8.122 ns                ;
; 11.668 ns                               ; 120.02 MHz ( period = 8.332 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|m_dqm[0]        ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.539 ns                 ; 7.871 ns                ;
; 11.668 ns                               ; 120.02 MHz ( period = 8.332 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[33] ; system_0:u0|sdram_0:the_sdram_0|active_dqm[1]   ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.785 ns                 ; 8.117 ns                ;
; 11.668 ns                               ; 120.02 MHz ( period = 8.332 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[33] ; system_0:u0|sdram_0:the_sdram_0|active_dqm[0]   ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.785 ns                 ; 8.117 ns                ;
; 11.668 ns                               ; 120.02 MHz ( period = 8.332 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[33] ; system_0:u0|sdram_0:the_sdram_0|active_addr[9]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.785 ns                 ; 8.117 ns                ;
; 11.668 ns                               ; 120.02 MHz ( period = 8.332 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[33] ; system_0:u0|sdram_0:the_sdram_0|active_addr[8]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.785 ns                 ; 8.117 ns                ;
; 11.668 ns                               ; 120.02 MHz ( period = 8.332 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[33] ; system_0:u0|sdram_0:the_sdram_0|active_addr[21] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.785 ns                 ; 8.117 ns                ;
; 11.668 ns                               ; 120.02 MHz ( period = 8.332 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[26] ; system_0:u0|sdram_0:the_sdram_0|active_addr[18] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.795 ns                 ; 8.127 ns                ;
; 11.668 ns                               ; 120.02 MHz ( period = 8.332 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[26] ; system_0:u0|sdram_0:the_sdram_0|active_addr[12] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.795 ns                 ; 8.127 ns                ;
; 11.668 ns                               ; 120.02 MHz ( period = 8.332 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[26] ; system_0:u0|sdram_0:the_sdram_0|active_addr[19] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.795 ns                 ; 8.127 ns                ;
; 11.669 ns                               ; 120.03 MHz ( period = 8.331 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[27] ; system_0:u0|sdram_0:the_sdram_0|m_addr[2]       ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.513 ns                 ; 7.844 ns                ;
; 11.671 ns                               ; 120.06 MHz ( period = 8.329 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|m_dqm[1]        ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.554 ns                 ; 7.883 ns                ;
; 11.672 ns                               ; 120.08 MHz ( period = 8.328 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[27] ; system_0:u0|sdram_0:the_sdram_0|m_addr[5]       ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.505 ns                 ; 7.833 ns                ;
; 11.672 ns                               ; 120.08 MHz ( period = 8.328 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[30] ; system_0:u0|sdram_0:the_sdram_0|active_addr[18] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.786 ns                 ; 8.114 ns                ;
; 11.672 ns                               ; 120.08 MHz ( period = 8.328 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[30] ; system_0:u0|sdram_0:the_sdram_0|active_addr[12] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.786 ns                 ; 8.114 ns                ;
; 11.672 ns                               ; 120.08 MHz ( period = 8.328 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[30] ; system_0:u0|sdram_0:the_sdram_0|active_addr[19] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.786 ns                 ; 8.114 ns                ;
; 11.680 ns                               ; 120.19 MHz ( period = 8.320 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|m_dqm[1]        ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.539 ns                 ; 7.859 ns                ;
; 11.681 ns                               ; 120.21 MHz ( period = 8.319 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[40] ; system_0:u0|sdram_0:the_sdram_0|m_addr[5]       ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.495 ns                 ; 7.814 ns                ;
; 11.684 ns                               ; 120.25 MHz ( period = 8.316 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[27] ; system_0:u0|sdram_0:the_sdram_0|active_data[6]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.800 ns                 ; 8.116 ns                ;
; 11.684 ns                               ; 120.25 MHz ( period = 8.316 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[27] ; system_0:u0|sdram_0:the_sdram_0|active_data[9]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.800 ns                 ; 8.116 ns                ;
; 11.684 ns                               ; 120.25 MHz ( period = 8.316 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[27] ; system_0:u0|sdram_0:the_sdram_0|active_data[7]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.800 ns                 ; 8.116 ns                ;
; 11.684 ns                               ; 120.25 MHz ( period = 8.316 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[27] ; system_0:u0|sdram_0:the_sdram_0|active_data[4]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.800 ns                 ; 8.116 ns                ;
; 11.684 ns                               ; 120.25 MHz ( period = 8.316 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[27] ; system_0:u0|sdram_0:the_sdram_0|active_data[10] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.800 ns                 ; 8.116 ns                ;
; 11.684 ns                               ; 120.25 MHz ( period = 8.316 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[27] ; system_0:u0|sdram_0:the_sdram_0|active_data[8]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.800 ns                 ; 8.116 ns                ;
; 11.688 ns                               ; 120.31 MHz ( period = 8.312 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[27] ; system_0:u0|sdram_0:the_sdram_0|active_addr[18] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.786 ns                 ; 8.098 ns                ;
; 11.688 ns                               ; 120.31 MHz ( period = 8.312 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[27] ; system_0:u0|sdram_0:the_sdram_0|active_addr[12] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.786 ns                 ; 8.098 ns                ;
; 11.688 ns                               ; 120.31 MHz ( period = 8.312 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[27] ; system_0:u0|sdram_0:the_sdram_0|active_addr[19] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.786 ns                 ; 8.098 ns                ;
; 11.693 ns                               ; 120.38 MHz ( period = 8.307 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[33] ; system_0:u0|sdram_0:the_sdram_0|active_addr[5]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.784 ns                 ; 8.091 ns                ;
; 11.693 ns                               ; 120.38 MHz ( period = 8.307 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[33] ; system_0:u0|sdram_0:the_sdram_0|active_addr[4]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.784 ns                 ; 8.091 ns                ;
; 11.693 ns                               ; 120.38 MHz ( period = 8.307 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[33] ; system_0:u0|sdram_0:the_sdram_0|active_addr[14] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.784 ns                 ; 8.091 ns                ;
; 11.693 ns                               ; 120.38 MHz ( period = 8.307 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[33] ; system_0:u0|sdram_0:the_sdram_0|active_addr[13] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.784 ns                 ; 8.091 ns                ;
; 11.693 ns                               ; 120.38 MHz ( period = 8.307 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[33] ; system_0:u0|sdram_0:the_sdram_0|active_addr[17] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.784 ns                 ; 8.091 ns                ;
; 11.693 ns                               ; 120.38 MHz ( period = 8.307 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[33] ; system_0:u0|sdram_0:the_sdram_0|active_addr[10] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.784 ns                 ; 8.091 ns                ;
; 11.697 ns                               ; 120.44 MHz ( period = 8.303 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[40] ; system_0:u0|sdram_0:the_sdram_0|active_addr[18] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.776 ns                 ; 8.079 ns                ;
; 11.697 ns                               ; 120.44 MHz ( period = 8.303 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[40] ; system_0:u0|sdram_0:the_sdram_0|active_addr[12] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.776 ns                 ; 8.079 ns                ;
; 11.697 ns                               ; 120.44 MHz ( period = 8.303 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[40] ; system_0:u0|sdram_0:the_sdram_0|active_addr[19] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.776 ns                 ; 8.079 ns                ;
; 11.699 ns                               ; 120.47 MHz ( period = 8.301 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[27] ; system_0:u0|sdram_0:the_sdram_0|active_addr[1]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.798 ns                 ; 8.099 ns                ;
; 11.699 ns                               ; 120.47 MHz ( period = 8.301 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[27] ; system_0:u0|sdram_0:the_sdram_0|active_data[5]  ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.798 ns                 ; 8.099 ns                ;
; 11.699 ns                               ; 120.47 MHz ( period = 8.301 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[27] ; system_0:u0|sdram_0:the_sdram_0|active_data[15] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.798 ns                 ; 8.099 ns                ;
; 11.699 ns                               ; 120.47 MHz ( period = 8.301 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[27] ; system_0:u0|sdram_0:the_sdram_0|active_data[14] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.798 ns                 ; 8.099 ns                ;
; 11.699 ns                               ; 120.47 MHz ( period = 8.301 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[27] ; system_0:u0|sdram_0:the_sdram_0|active_data[12] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.798 ns                 ; 8.099 ns                ;
; 11.699 ns                               ; 120.47 MHz ( period = 8.301 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[27] ; system_0:u0|sdram_0:the_sdram_0|active_data[13] ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.798 ns                 ; 8.099 ns                ;
; 11.703 ns                               ; 120.53 MHz ( period = 8.297 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[33] ; system_0:u0|sdram_0:the_sdram_0|m_addr[0]       ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.513 ns                 ; 7.810 ns                ;
; 11.716 ns                               ; 120.71 MHz ( period = 8.284 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[36] ; system_0:u0|sdram_0:the_sdram_0|m_addr[5]       ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.514 ns                 ; 7.798 ns                ;
; 11.720 ns                               ; 120.77 MHz ( period = 8.280 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address  ; system_0:u0|sdram_0:the_sdram_0|m_addr[7]       ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.521 ns                 ; 7.801 ns                ;
; 11.729 ns                               ; 120.90 MHz ( period = 8.271 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[34] ; system_0:u0|sdram_0:the_sdram_0|m_addr[5]       ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.504 ns                 ; 7.775 ns                ;
; 11.730 ns                               ; 120.92 MHz ( period = 8.270 ns )                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30] ; system_0:u0|sdram_0:the_sdram_0|m_addr[7]       ; CLOCK_50   ; CLOCK_50 ; 20.000 ns                   ; 19.506 ns                 ; 7.776 ns                ;
; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ;                                                                                                       ;                                                 ;            ;          ;                             ;                           ;                         ;
+-----------------------------------------+-----------------------------------------------------+-------------------------------------------------------------------------------------------------------+-------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'altera_internal_jtag~TCKUTAP'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                        ;
+-----------------------------------------+-----------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------+------------------------------+-----------------------------+---------------------------+-------------------------+
; Slack                                   ; Actual fmax (period)                                ; From                                                                                                                                                                                                                     ; To                                                                                                                                                                                                    ; From Clock                   ; To Clock                     ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-----------------------------------------+-----------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------+------------------------------+-----------------------------+---------------------------+-------------------------+
; N/A                                     ; 139.55 MHz ( period = 7.166 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[11]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 6.925 ns                ;
; N/A                                     ; 142.84 MHz ( period = 7.001 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[11]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 6.761 ns                ;
; N/A                                     ; 143.53 MHz ( period = 6.967 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[10]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 6.726 ns                ;
; N/A                                     ; 145.54 MHz ( period = 6.871 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[13]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 6.638 ns                ;
; N/A                                     ; 146.07 MHz ( period = 6.846 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[9]        ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 6.605 ns                ;
; N/A                                     ; 147.02 MHz ( period = 6.802 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[10]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 6.562 ns                ;
; N/A                                     ; 147.19 MHz ( period = 6.794 ns )                    ; sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[0]                                                                                                                                                                  ; sld_hub:sld_hub_inst|hub_tdo                                                                                                                                                                          ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 3.185 ns                ;
; N/A                                     ; 148.46 MHz ( period = 6.736 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[14]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 6.503 ns                ;
; N/A                                     ; 148.50 MHz ( period = 6.734 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[12]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 6.501 ns                ;
; N/A                                     ; 149.12 MHz ( period = 6.706 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[13]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 6.474 ns                ;
; N/A                                     ; 149.28 MHz ( period = 6.699 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[28]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 6.494 ns                ;
; N/A                                     ; 149.68 MHz ( period = 6.681 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[9]        ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 6.441 ns                ;
; N/A                                     ; 149.99 MHz ( period = 6.667 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[25]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 6.462 ns                ;
; N/A                                     ; 149.99 MHz ( period = 6.667 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[26]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 6.462 ns                ;
; N/A                                     ; 151.15 MHz ( period = 6.616 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0]                                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[11]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 6.383 ns                ;
; N/A                                     ; 152.18 MHz ( period = 6.571 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[14]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 6.339 ns                ;
; N/A                                     ; 152.23 MHz ( period = 6.569 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[12]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 6.337 ns                ;
; N/A                                     ; 153.05 MHz ( period = 6.534 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[28]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 6.330 ns                ;
; N/A                                     ; 153.80 MHz ( period = 6.502 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[25]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 6.298 ns                ;
; N/A                                     ; 153.80 MHz ( period = 6.502 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[26]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 6.298 ns                ;
; N/A                                     ; 155.13 MHz ( period = 6.446 ns )                    ; sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_aoi:auto_generated|dffe1a[0]                                                                                                                                  ; sld_hub:sld_hub_inst|hub_tdo                                                                                                                                                                          ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 3.012 ns                ;
; N/A                                     ; 155.84 MHz ( period = 6.417 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0]                                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[10]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 6.184 ns                ;
; N/A                                     ; 156.91 MHz ( period = 6.373 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[29]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 6.168 ns                ;
; N/A                                     ; 157.06 MHz ( period = 6.367 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[27]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 6.162 ns                ;
; N/A                                     ; 158.20 MHz ( period = 6.321 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0]                                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[13]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 6.096 ns                ;
; N/A                                     ; 158.83 MHz ( period = 6.296 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0]                                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[9]        ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 6.063 ns                ;
; N/A                                     ; 160.13 MHz ( period = 6.245 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[18]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 6.024 ns                ;
; N/A                                     ; 160.15 MHz ( period = 6.244 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[17]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 6.023 ns                ;
; N/A                                     ; 161.08 MHz ( period = 6.208 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[29]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 6.004 ns                ;
; N/A                                     ; 161.13 MHz ( period = 6.206 ns )                    ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[0]                           ; sld_hub:sld_hub_inst|hub_tdo                                                                                                                                                                          ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 2.907 ns                ;
; N/A                                     ; 161.24 MHz ( period = 6.202 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[27]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.998 ns                ;
; N/A                                     ; 161.66 MHz ( period = 6.186 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0]                                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[14]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.961 ns                ;
; N/A                                     ; 161.71 MHz ( period = 6.184 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0]                                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[12]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.959 ns                ;
; N/A                                     ; 162.63 MHz ( period = 6.149 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0]                                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[28]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.952 ns                ;
; N/A                                     ; 162.68 MHz ( period = 6.147 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0]                                                                                                                                                                              ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[11]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.914 ns                ;
; N/A                                     ; 163.48 MHz ( period = 6.117 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0]                                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[25]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.920 ns                ;
; N/A                                     ; 163.48 MHz ( period = 6.117 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0]                                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[26]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.920 ns                ;
; N/A                                     ; 164.47 MHz ( period = 6.080 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[18]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.860 ns                ;
; N/A                                     ; 164.50 MHz ( period = 6.079 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[17]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.859 ns                ;
; N/A                                     ; 165.48 MHz ( period = 6.043 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[16]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.822 ns                ;
; N/A                                     ; 165.62 MHz ( period = 6.038 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; sld_hub:sld_hub_inst|hub_tdo                                                                                                                                                                          ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 2.804 ns                ;
; N/A                                     ; 167.17 MHz ( period = 5.982 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[24]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.732 ns                ;
; N/A                                     ; 167.36 MHz ( period = 5.975 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[19]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.725 ns                ;
; N/A                                     ; 167.42 MHz ( period = 5.973 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[22]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.723 ns                ;
; N/A                                     ; 167.45 MHz ( period = 5.972 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[33]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.767 ns                ;
; N/A                                     ; 168.12 MHz ( period = 5.948 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0]                                                                                                                                                                              ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[10]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.715 ns                ;
; N/A                                     ; 168.35 MHz ( period = 5.940 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[20]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.690 ns                ;
; N/A                                     ; 170.13 MHz ( period = 5.878 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[16]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.658 ns                ;
; N/A                                     ; 170.18 MHz ( period = 5.876 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[30]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.671 ns                ;
; N/A                                     ; 170.65 MHz ( period = 5.860 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[32]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.655 ns                ;
; N/A                                     ; 170.65 MHz ( period = 5.860 ns )                    ; system_0:u0|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|td_shift[0]                                                                                                                      ; sld_hub:sld_hub_inst|hub_tdo                                                                                                                                                                          ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 2.694 ns                ;
; N/A                                     ; 170.82 MHz ( period = 5.854 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[36]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.613 ns                ;
; N/A                                     ; 170.82 MHz ( period = 5.854 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[37]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.613 ns                ;
; N/A                                     ; 170.88 MHz ( period = 5.852 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0]                                                                                                                                                                              ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[13]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.627 ns                ;
; N/A                                     ; 171.61 MHz ( period = 5.827 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0]                                                                                                                                                                              ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[9]        ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.594 ns                ;
; N/A                                     ; 171.73 MHz ( period = 5.823 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0]                                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[29]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.626 ns                ;
; N/A                                     ; 171.91 MHz ( period = 5.817 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[24]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.568 ns                ;
; N/A                                     ; 171.91 MHz ( period = 5.817 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0]                                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[27]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.620 ns                ;
; N/A                                     ; 172.12 MHz ( period = 5.810 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[19]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.561 ns                ;
; N/A                                     ; 172.18 MHz ( period = 5.808 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[22]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.559 ns                ;
; N/A                                     ; 172.21 MHz ( period = 5.807 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[33]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.603 ns                ;
; N/A                                     ; 172.44 MHz ( period = 5.799 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[21]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.549 ns                ;
; N/A                                     ; 172.53 MHz ( period = 5.796 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[23]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.546 ns                ;
; N/A                                     ; 173.16 MHz ( period = 5.775 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[20]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.526 ns                ;
; N/A                                     ; 174.83 MHz ( period = 5.720 ns )                    ; sld_hub:sld_hub_inst|HUB_BYPASS_REG                                                                                                                                                                                      ; sld_hub:sld_hub_inst|hub_tdo                                                                                                                                                                          ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 2.653 ns                ;
; N/A                                     ; 174.92 MHz ( period = 5.717 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0]                                                                                                                                                                              ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[14]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.492 ns                ;
; N/A                                     ; 174.98 MHz ( period = 5.715 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0]                                                                                                                                                                              ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[12]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.490 ns                ;
; N/A                                     ; 175.10 MHz ( period = 5.711 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[30]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.507 ns                ;
; N/A                                     ; 175.59 MHz ( period = 5.695 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[32]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.491 ns                ;
; N/A                                     ; 175.59 MHz ( period = 5.695 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0]                                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[18]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.482 ns                ;
; N/A                                     ; 175.62 MHz ( period = 5.694 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0]                                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[17]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.481 ns                ;
; N/A                                     ; 176.06 MHz ( period = 5.680 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0]                                                                                                                                                                              ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[28]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.483 ns                ;
; N/A                                     ; 176.15 MHz ( period = 5.677 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[36]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.437 ns                ;
; N/A                                     ; 176.15 MHz ( period = 5.677 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[37]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.437 ns                ;
; N/A                                     ; 176.52 MHz ( period = 5.665 ns )                    ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|in_between_shiftdr_and_updatedr ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[11]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.442 ns                ;
; N/A                                     ; 177.05 MHz ( period = 5.648 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0]                                                                                                                                                                              ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[25]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.451 ns                ;
; N/A                                     ; 177.05 MHz ( period = 5.648 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0]                                                                                                                                                                              ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[26]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.451 ns                ;
; N/A                                     ; 177.49 MHz ( period = 5.634 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[21]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.385 ns                ;
; N/A                                     ; 177.59 MHz ( period = 5.631 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[23]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.382 ns                ;
; N/A                                     ; 182.05 MHz ( period = 5.493 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0]                                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[16]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.280 ns                ;
; N/A                                     ; 182.95 MHz ( period = 5.466 ns )                    ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|in_between_shiftdr_and_updatedr ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[10]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.243 ns                ;
; N/A                                     ; 184.09 MHz ( period = 5.432 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0]                                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[24]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.190 ns                ;
; N/A                                     ; 184.33 MHz ( period = 5.425 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0]                                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[19]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.183 ns                ;
; N/A                                     ; 184.40 MHz ( period = 5.423 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0]                                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[22]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.181 ns                ;
; N/A                                     ; 184.43 MHz ( period = 5.422 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0]                                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[33]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.225 ns                ;
; N/A                                     ; 185.53 MHz ( period = 5.390 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0]                                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[20]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.148 ns                ;
; N/A                                     ; 186.78 MHz ( period = 5.354 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0]                                                                                                                                                                              ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[29]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.157 ns                ;
; N/A                                     ; 186.99 MHz ( period = 5.348 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0]                                                                                                                                                                              ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[27]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.151 ns                ;
; N/A                                     ; 187.09 MHz ( period = 5.345 ns )                    ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|in_between_shiftdr_and_updatedr ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[9]        ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.122 ns                ;
; N/A                                     ; 187.76 MHz ( period = 5.326 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0]                                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[30]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.129 ns                ;
; N/A                                     ; 188.32 MHz ( period = 5.310 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0]                                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[32]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.113 ns                ;
; N/A                                     ; 188.39 MHz ( period = 5.308 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[1]                                                                                                                                                                              ; sld_hub:sld_hub_inst|hub_tdo                                                                                                                                                                          ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 2.447 ns                ;
; N/A                                     ; 188.96 MHz ( period = 5.292 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:IRF_ENA_0|Q[0]                                                                                                                                                                            ; sld_hub:sld_hub_inst|hub_tdo                                                                                                                                                                          ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 2.439 ns                ;
; N/A                                     ; 189.07 MHz ( period = 5.289 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0]                                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[36]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.056 ns                ;
; N/A                                     ; 189.07 MHz ( period = 5.289 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0]                                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[37]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.056 ns                ;
; N/A                                     ; 190.51 MHz ( period = 5.249 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0]                                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[21]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.007 ns                ;
; N/A                                     ; 190.62 MHz ( period = 5.246 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0]                                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[23]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.004 ns                ;
; N/A                                     ; 191.06 MHz ( period = 5.234 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[3]        ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.022 ns                ;
; N/A                                     ; 191.06 MHz ( period = 5.234 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[4]        ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.022 ns                ;
; N/A                                     ; 191.06 MHz ( period = 5.234 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[2]        ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.022 ns                ;
; N/A                                     ; 191.06 MHz ( period = 5.234 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[1]        ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.022 ns                ;
; N/A                                     ; 191.35 MHz ( period = 5.226 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0]                                                                                                                                                                              ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[18]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.013 ns                ;
; N/A                                     ; 191.39 MHz ( period = 5.225 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0]                                                                                                                                                                              ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[17]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.012 ns                ;
; N/A                                     ; 192.38 MHz ( period = 5.198 ns )                    ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|in_between_shiftdr_and_updatedr ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[28]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 5.011 ns                ;
; N/A                                     ; 193.57 MHz ( period = 5.166 ns )                    ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|in_between_shiftdr_and_updatedr ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[25]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.979 ns                ;
; N/A                                     ; 193.57 MHz ( period = 5.166 ns )                    ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|in_between_shiftdr_and_updatedr ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[26]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.979 ns                ;
; N/A                                     ; 196.12 MHz ( period = 5.099 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[35]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.894 ns                ;
; N/A                                     ; 197.75 MHz ( period = 5.057 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[3]        ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.846 ns                ;
; N/A                                     ; 197.75 MHz ( period = 5.057 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[4]        ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.846 ns                ;
; N/A                                     ; 197.75 MHz ( period = 5.057 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[2]        ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.846 ns                ;
; N/A                                     ; 197.75 MHz ( period = 5.057 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[1]        ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.846 ns                ;
; N/A                                     ; 198.14 MHz ( period = 5.047 ns )                    ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|in_between_shiftdr_and_updatedr ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[13]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.832 ns                ;
; N/A                                     ; 198.93 MHz ( period = 5.027 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[5]        ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.786 ns                ;
; N/A                                     ; 198.93 MHz ( period = 5.027 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[6]        ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.786 ns                ;
; N/A                                     ; 198.93 MHz ( period = 5.027 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[7]        ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.786 ns                ;
; N/A                                     ; 198.93 MHz ( period = 5.027 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[8]        ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.786 ns                ;
; N/A                                     ; 199.04 MHz ( period = 5.024 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0]                                                                                                                                                                              ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[16]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.811 ns                ;
; N/A                                     ; 199.52 MHz ( period = 5.012 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|ir[0]        ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.771 ns                ;
; N/A                                     ; 199.52 MHz ( period = 5.012 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|ir[1]        ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.771 ns                ;
; N/A                                     ; 200.20 MHz ( period = 4.995 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[34]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.790 ns                ;
; N/A                                     ; 200.80 MHz ( period = 4.980 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[31]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.775 ns                ;
; N/A                                     ; 201.49 MHz ( period = 4.963 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0]                                                                                                                                                                              ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[24]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.721 ns                ;
; N/A                                     ; 201.78 MHz ( period = 4.956 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0]                                                                                                                                                                              ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[19]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.714 ns                ;
; N/A                                     ; 201.86 MHz ( period = 4.954 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0]                                                                                                                                                                              ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[22]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.712 ns                ;
; N/A                                     ; 201.90 MHz ( period = 4.953 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0]                                                                                                                                                                              ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[33]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.756 ns                ;
; N/A                                     ; 202.68 MHz ( period = 4.934 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[35]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.730 ns                ;
; N/A                                     ; 202.96 MHz ( period = 4.927 ns )                    ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|ir[0]                           ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[13]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.721 ns                ;
; N/A                                     ; 203.21 MHz ( period = 4.921 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0]                                                                                                                                                                              ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[20]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.679 ns                ;
; N/A                                     ; 204.67 MHz ( period = 4.886 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|jupdate                                                                                                       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 2.221 ns                ;
; N/A                                     ; 205.25 MHz ( period = 4.872 ns )                    ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|in_between_shiftdr_and_updatedr ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[29]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.685 ns                ;
; N/A                                     ; 205.51 MHz ( period = 4.866 ns )                    ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|in_between_shiftdr_and_updatedr ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[27]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.679 ns                ;
; N/A                                     ; 205.89 MHz ( period = 4.857 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0]                                                                                                                                                                              ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[30]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.660 ns                ;
; N/A                                     ; 206.19 MHz ( period = 4.850 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[5]        ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.610 ns                ;
; N/A                                     ; 206.19 MHz ( period = 4.850 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[6]        ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.610 ns                ;
; N/A                                     ; 206.19 MHz ( period = 4.850 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[7]        ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.610 ns                ;
; N/A                                     ; 206.19 MHz ( period = 4.850 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[8]        ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.610 ns                ;
; N/A                                     ; 206.57 MHz ( period = 4.841 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0]                                                                                                                                                                              ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[32]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.644 ns                ;
; N/A                                     ; 206.83 MHz ( period = 4.835 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|ir[0]        ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.595 ns                ;
; N/A                                     ; 206.83 MHz ( period = 4.835 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|ir[1]        ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.595 ns                ;
; N/A                                     ; 207.04 MHz ( period = 4.830 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[34]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.626 ns                ;
; N/A                                     ; 207.25 MHz ( period = 4.825 ns )                    ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|in_between_shiftdr_and_updatedr ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[14]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.610 ns                ;
; N/A                                     ; 207.34 MHz ( period = 4.823 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0]                                                                                                                                                                              ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[36]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.590 ns                ;
; N/A                                     ; 207.34 MHz ( period = 4.823 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0]                                                                                                                                                                              ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[37]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.590 ns                ;
; N/A                                     ; 207.34 MHz ( period = 4.823 ns )                    ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|in_between_shiftdr_and_updatedr ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[12]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.608 ns                ;
; N/A                                     ; 207.68 MHz ( period = 4.815 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[31]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.611 ns                ;
; N/A                                     ; 208.94 MHz ( period = 4.786 ns )                    ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|ir[0]                           ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[11]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.572 ns                ;
; N/A                                     ; 209.21 MHz ( period = 4.780 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0]                                                                                                                                                                              ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[21]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.538 ns                ;
; N/A                                     ; 209.34 MHz ( period = 4.777 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0]                                                                                                                                                                              ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[23]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.535 ns                ;
; N/A                                     ; 211.95 MHz ( period = 4.718 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0]                                                                                                                                                                              ; sld_hub:sld_hub_inst|hub_tdo                                                                                                                                                                          ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 2.152 ns                ;
; N/A                                     ; 212.36 MHz ( period = 4.709 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|jdo[37]~reg0 ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.468 ns                ;
; N/A                                     ; 212.36 MHz ( period = 4.709 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|jdo[36]~reg0 ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.468 ns                ;
; N/A                                     ; 212.36 MHz ( period = 4.709 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|jdo[11]~reg0 ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.468 ns                ;
; N/A                                     ; 212.36 MHz ( period = 4.709 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|jdo[12]~reg0 ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.468 ns                ;
; N/A                                     ; 212.36 MHz ( period = 4.709 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|jdo[14]~reg0 ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.468 ns                ;
; N/A                                     ; 212.36 MHz ( period = 4.709 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|jdo[15]~reg0 ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.468 ns                ;
; N/A                                     ; 212.36 MHz ( period = 4.709 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|jdo[5]~reg0  ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.468 ns                ;
; N/A                                     ; 212.36 MHz ( period = 4.709 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|jdo[6]~reg0  ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.468 ns                ;
; N/A                                     ; 212.36 MHz ( period = 4.709 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|jdo[7]~reg0  ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.468 ns                ;
; N/A                                     ; 212.36 MHz ( period = 4.709 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|jdo[8]~reg0  ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.468 ns                ;
; N/A                                     ; 212.36 MHz ( period = 4.709 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|jdo[4]~reg0  ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.468 ns                ;
; N/A                                     ; 212.36 MHz ( period = 4.709 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|jdo[2]~reg0  ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.468 ns                ;
; N/A                                     ; 212.36 MHz ( period = 4.709 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|jdo[1]~reg0  ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.468 ns                ;
; N/A                                     ; 212.36 MHz ( period = 4.709 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|jdo[0]~reg0  ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.468 ns                ;
; N/A                                     ; 214.18 MHz ( period = 4.669 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0]                                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[3]        ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.465 ns                ;
; N/A                                     ; 214.18 MHz ( period = 4.669 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0]                                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[4]        ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.465 ns                ;
; N/A                                     ; 214.18 MHz ( period = 4.669 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0]                                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[2]        ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.465 ns                ;
; N/A                                     ; 214.18 MHz ( period = 4.669 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0]                                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[1]        ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.465 ns                ;
; N/A                                     ; 214.68 MHz ( period = 4.658 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[15]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.425 ns                ;
; N/A                                     ; 214.68 MHz ( period = 4.658 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[0]        ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.425 ns                ;
; N/A                                     ; 215.47 MHz ( period = 4.641 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|jdo[18]~reg0 ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.419 ns                ;
; N/A                                     ; 216.17 MHz ( period = 4.626 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|jdo[34]~reg0 ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.376 ns                ;
; N/A                                     ; 216.17 MHz ( period = 4.626 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|jdo[35]~reg0 ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.376 ns                ;
; N/A                                     ; 216.17 MHz ( period = 4.626 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|jdo[21]~reg0 ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.376 ns                ;
; N/A                                     ; 216.17 MHz ( period = 4.626 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|jdo[24]~reg0 ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.376 ns                ;
; N/A                                     ; 216.17 MHz ( period = 4.626 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|jdo[13]~reg0 ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.376 ns                ;
; N/A                                     ; 216.17 MHz ( period = 4.626 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|jdo[16]~reg0 ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.376 ns                ;
; N/A                                     ; 216.17 MHz ( period = 4.626 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|jdo[19]~reg0 ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.376 ns                ;
; N/A                                     ; 216.17 MHz ( period = 4.626 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|jdo[20]~reg0 ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.376 ns                ;
; N/A                                     ; 216.17 MHz ( period = 4.626 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|jdo[10]~reg0 ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.376 ns                ;
; N/A                                     ; 216.17 MHz ( period = 4.626 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|jdo[9]~reg0  ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.376 ns                ;
; N/A                                     ; 218.01 MHz ( period = 4.587 ns )                    ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|ir[0]                           ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[10]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.373 ns                ;
; N/A                                     ; 218.29 MHz ( period = 4.581 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|jdo[33]~reg0 ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.383 ns                ;
; N/A                                     ; 218.53 MHz ( period = 4.576 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|jdo[17]~reg0 ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.364 ns                ;
; N/A                                     ; 218.53 MHz ( period = 4.576 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|jdo[26]~reg0 ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.364 ns                ;
; N/A                                     ; 218.53 MHz ( period = 4.576 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|jdo[28]~reg0 ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.364 ns                ;
; N/A                                     ; 218.53 MHz ( period = 4.576 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|jdo[30]~reg0 ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.364 ns                ;
; N/A                                     ; 218.53 MHz ( period = 4.576 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|jdo[32]~reg0 ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.364 ns                ;
; N/A                                     ; 218.53 MHz ( period = 4.576 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|jdo[3]~reg0  ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.364 ns                ;
; N/A                                     ; 218.72 MHz ( period = 4.572 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[0]                                                                                                                                                                                 ; sld_hub:sld_hub_inst|hub_tdo                                                                                                                                                                          ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 2.075 ns                ;
; N/A                                     ; 219.59 MHz ( period = 4.554 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|jupdate                                                                                                       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 2.056 ns                ;
; N/A                                     ; 219.68 MHz ( period = 4.552 ns )                    ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|in_between_shiftdr_and_updatedr ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[17]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.349 ns                ;
; N/A                                     ; 219.83 MHz ( period = 4.549 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0]                                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[35]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.352 ns                ;
; N/A                                     ; 219.93 MHz ( period = 4.547 ns )                    ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|in_between_shiftdr_and_updatedr ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[18]       ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.344 ns                ;
; N/A                                     ; 220.07 MHz ( period = 4.544 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|jdo[5]~reg0  ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.304 ns                ;
; N/A                                     ; 220.07 MHz ( period = 4.544 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|jdo[6]~reg0  ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.304 ns                ;
; N/A                                     ; 220.07 MHz ( period = 4.544 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|jdo[7]~reg0  ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.304 ns                ;
; N/A                                     ; 220.07 MHz ( period = 4.544 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|jdo[8]~reg0  ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.304 ns                ;
; N/A                                     ; 220.07 MHz ( period = 4.544 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|jdo[4]~reg0  ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.304 ns                ;
; N/A                                     ; 220.07 MHz ( period = 4.544 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|jdo[2]~reg0  ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.304 ns                ;
; N/A                                     ; 220.07 MHz ( period = 4.544 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|jdo[1]~reg0  ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; 4.304 ns                ;
; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ;                                                                                                                                                                                                                          ;                                                                                                                                                                                                       ;                              ;                              ;                             ;                           ;                         ;
+-----------------------------------------+-----------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------+------------------------------+-----------------------------+---------------------------+-------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Hold: 'SDRAM_PLL:PLL1|altpll:altpll_component|_clk1'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                       ;
+-----------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------+----------------------------------------------+----------------------------+----------------------------+--------------------------+
; Minimum Slack                           ; From                                                                                                                                                                                                ; To                                                                                                                                                                                            ; From Clock                                   ; To Clock                                     ; Required Hold Relationship ; Required Shortest P2P Time ; Actual Shortest P2P Time ;
+-----------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------+----------------------------------------------+----------------------------+----------------------------+--------------------------+
; 0.391 ns                                ; system_0:u0|jtag_uart_0:the_jtag_uart_0|jtag_uart_0_scfifo_w:the_jtag_uart_0_scfifo_w|scfifo:wfifo|scfifo_1n21:auto_generated|a_dpfifo_8t21:dpfifo|a_fefifo_7cf:fifo_state|b_non_empty              ; system_0:u0|jtag_uart_0:the_jtag_uart_0|jtag_uart_0_scfifo_w:the_jtag_uart_0_scfifo_w|scfifo:wfifo|scfifo_1n21:auto_generated|a_dpfifo_8t21:dpfifo|a_fefifo_7cf:fifo_state|b_non_empty        ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|jtag_uart_0:the_jtag_uart_0|r_val                                                                                                                                                       ; system_0:u0|jtag_uart_0:the_jtag_uart_0|r_val                                                                                                                                                 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|r_ena1                                                                                                      ; system_0:u0|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|r_ena1                                                                                                ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|t_ena~reg0                                                                                                  ; system_0:u0|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|t_ena~reg0                                                                                            ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|jtag_uart_0:the_jtag_uart_0|jtag_uart_0_scfifo_r:the_jtag_uart_0_scfifo_r|scfifo:rfifo|scfifo_1n21:auto_generated|a_dpfifo_8t21:dpfifo|a_fefifo_7cf:fifo_state|b_full                   ; system_0:u0|jtag_uart_0:the_jtag_uart_0|jtag_uart_0_scfifo_r:the_jtag_uart_0_scfifo_r|scfifo:rfifo|scfifo_1n21:auto_generated|a_dpfifo_8t21:dpfifo|a_fefifo_7cf:fifo_state|b_full             ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|A_dc_latest_data_valid_byte_3                                                                                                                                           ; system_0:u0|cpu_0:the_cpu_0|A_dc_latest_data_valid_byte_3                                                                                                                                     ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|jtag_uart_0:the_jtag_uart_0|rvalid                                                                                                                                                      ; system_0:u0|jtag_uart_0:the_jtag_uart_0|rvalid                                                                                                                                                ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|jtag_uart_0:the_jtag_uart_0|woverflow                                                                                                                                                   ; system_0:u0|jtag_uart_0:the_jtag_uart_0|woverflow                                                                                                                                             ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|jtag_uart_0:the_jtag_uart_0|ac                                                                                                                                                          ; system_0:u0|jtag_uart_0:the_jtag_uart_0|ac                                                                                                                                                    ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_avalon_slave_arb_share_counter[2]                                                     ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_avalon_slave_arb_share_counter[2]                                               ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_avalon_slave_arb_share_counter[0]                                                     ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_avalon_slave_arb_share_counter[0]                                               ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|jtag_uart_0:the_jtag_uart_0|jtag_uart_0_scfifo_r:the_jtag_uart_0_scfifo_r|scfifo:rfifo|scfifo_1n21:auto_generated|a_dpfifo_8t21:dpfifo|a_fefifo_7cf:fifo_state|b_non_empty              ; system_0:u0|jtag_uart_0:the_jtag_uart_0|jtag_uart_0_scfifo_r:the_jtag_uart_0_scfifo_r|scfifo:rfifo|scfifo_1n21:auto_generated|a_dpfifo_8t21:dpfifo|a_fefifo_7cf:fifo_state|b_non_empty        ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|jtag_uart_0:the_jtag_uart_0|jtag_uart_0_scfifo_w:the_jtag_uart_0_scfifo_w|scfifo:wfifo|scfifo_1n21:auto_generated|a_dpfifo_8t21:dpfifo|a_fefifo_7cf:fifo_state|b_full                   ; system_0:u0|jtag_uart_0:the_jtag_uart_0|jtag_uart_0_scfifo_w:the_jtag_uart_0_scfifo_w|scfifo:wfifo|scfifo_1n21:auto_generated|a_dpfifo_8t21:dpfifo|a_fefifo_7cf:fifo_state|b_full             ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|ic_fill_ap_cnt[0]                                                                                                                                                       ; system_0:u0|cpu_0:the_cpu_0|ic_fill_ap_cnt[0]                                                                                                                                                 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|ic_fill_ap_cnt[1]                                                                                                                                                       ; system_0:u0|cpu_0:the_cpu_0|ic_fill_ap_cnt[1]                                                                                                                                                 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_nios2_oci_debug:the_cpu_0_nios2_oci_debug|monitor_go                                                                          ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_nios2_oci_debug:the_cpu_0_nios2_oci_debug|monitor_go                                                                    ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|button_pio:the_button_pio|edge_capture[1]                                                                                                                                               ; system_0:u0|button_pio:the_button_pio|edge_capture[1]                                                                                                                                         ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|button_pio:the_button_pio|edge_capture[3]                                                                                                                                               ; system_0:u0|button_pio:the_button_pio|edge_capture[3]                                                                                                                                         ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|button_pio:the_button_pio|edge_capture[2]                                                                                                                                               ; system_0:u0|button_pio:the_button_pio|edge_capture[2]                                                                                                                                         ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|button_pio:the_button_pio|edge_capture[0]                                                                                                                                               ; system_0:u0|button_pio:the_button_pio|edge_capture[0]                                                                                                                                         ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|jtag_uart_0:the_jtag_uart_0|pause_irq                                                                                                                                                   ; system_0:u0|jtag_uart_0:the_jtag_uart_0|pause_irq                                                                                                                                             ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|ic_fill_ap_cnt[2]                                                                                                                                                       ; system_0:u0|cpu_0:the_cpu_0|ic_fill_ap_cnt[2]                                                                                                                                                 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|last_cycle_cpu_0_data_master_granted_slave_cfi_flash_0_s1                                                ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|last_cycle_cpu_0_data_master_granted_slave_cfi_flash_0_s1                                          ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|sram_0_avalon_slave_0_arbitrator:the_sram_0_avalon_slave_0|last_cycle_cpu_0_data_master_granted_slave_sram_0_avalon_slave_0                                                             ; system_0:u0|sram_0_avalon_slave_0_arbitrator:the_sram_0_avalon_slave_0|last_cycle_cpu_0_data_master_granted_slave_sram_0_avalon_slave_0                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|last_cycle_cpu_0_instruction_master_granted_slave_cfi_flash_0_s1                                         ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|last_cycle_cpu_0_instruction_master_granted_slave_cfi_flash_0_s1                                   ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|sram_0_avalon_slave_0_arbitrator:the_sram_0_avalon_slave_0|last_cycle_cpu_0_instruction_master_granted_slave_sram_0_avalon_slave_0                                                      ; system_0:u0|sram_0_avalon_slave_0_arbitrator:the_sram_0_avalon_slave_0|last_cycle_cpu_0_instruction_master_granted_slave_sram_0_avalon_slave_0                                                ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|sram_0_avalon_slave_0_arbitrator:the_sram_0_avalon_slave_0|sram_0_avalon_slave_0_slavearbiterlockenable                                                                                 ; system_0:u0|sram_0_avalon_slave_0_arbitrator:the_sram_0_avalon_slave_0|sram_0_avalon_slave_0_slavearbiterlockenable                                                                           ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|timer_0:the_timer_0|timeout_occurred                                                                                                                                                    ; system_0:u0|timer_0:the_timer_0|timeout_occurred                                                                                                                                              ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|timer_1:the_timer_1|timeout_occurred                                                                                                                                                    ; system_0:u0|timer_1:the_timer_1|timeout_occurred                                                                                                                                              ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|cpu_0_instruction_master_dbs_address[0]                                                                                ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|cpu_0_instruction_master_dbs_address[0]                                                                          ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|cpu_0_instruction_master_dbs_rdv_counter[0]                                                                            ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|cpu_0_instruction_master_dbs_rdv_counter[0]                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|cpu_0_instruction_master_dbs_rdv_counter[1]                                                                            ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|cpu_0_instruction_master_dbs_rdv_counter[1]                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_avalon_slave_slavearbiterlockenable                                                   ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_avalon_slave_slavearbiterlockenable                                             ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|clock_1:the_clock_1|clock_1_slave_FSM:slave_FSM|slave_state.010                                                                                                                         ; system_0:u0|clock_1:the_clock_1|clock_1_slave_FSM:slave_FSM|slave_state.010                                                                                                                   ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|cpu_0_instruction_master_dbs_address[1]                                                                                ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|cpu_0_instruction_master_dbs_address[1]                                                                          ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|ic_fill_ap_cnt[3]                                                                                                                                                       ; system_0:u0|cpu_0:the_cpu_0|ic_fill_ap_cnt[3]                                                                                                                                                 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_avalon_slave_arb_addend[1]                                                            ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_avalon_slave_arb_addend[1]                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_avalon_slave_arb_addend[0]                                                            ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_avalon_slave_arb_addend[0]                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|sram_0_avalon_slave_0_arbitrator:the_sram_0_avalon_slave_0|sram_0_avalon_slave_0_arb_addend[1]                                                                                          ; system_0:u0|sram_0_avalon_slave_0_arbitrator:the_sram_0_avalon_slave_0|sram_0_avalon_slave_0_arb_addend[1]                                                                                    ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|sram_0_avalon_slave_0_arbitrator:the_sram_0_avalon_slave_0|sram_0_avalon_slave_0_arb_addend[0]                                                                                          ; system_0:u0|sram_0_avalon_slave_0_arbitrator:the_sram_0_avalon_slave_0|sram_0_avalon_slave_0_arb_addend[0]                                                                                    ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|cpu_0_data_master_dbs_address[0]                                                                                                     ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|cpu_0_data_master_dbs_address[0]                                                                                               ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|cpu_0_data_master_dbs_address[1]                                                                                                     ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|cpu_0_data_master_dbs_address[1]                                                                                               ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_nios2_avalon_reg:the_cpu_0_nios2_avalon_reg|oci_single_step_mode                                                              ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_nios2_avalon_reg:the_cpu_0_nios2_avalon_reg|oci_single_step_mode                                                        ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_nios2_oci_debug:the_cpu_0_nios2_oci_debug|probepresent                                                                        ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_nios2_oci_debug:the_cpu_0_nios2_oci_debug|probepresent                                                                  ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|A_dc_latest_data_valid_byte_2                                                                                                                                           ; system_0:u0|cpu_0:the_cpu_0|A_dc_latest_data_valid_byte_2                                                                                                                                     ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|A_dc_latest_data_valid_byte_1                                                                                                                                           ; system_0:u0|cpu_0:the_cpu_0|A_dc_latest_data_valid_byte_1                                                                                                                                     ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|ic_fill_valid_bits[7]                                                                                                                                                   ; system_0:u0|cpu_0:the_cpu_0|ic_fill_valid_bits[7]                                                                                                                                             ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|ic_fill_valid_bits[6]                                                                                                                                                   ; system_0:u0|cpu_0:the_cpu_0|ic_fill_valid_bits[6]                                                                                                                                             ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|ic_fill_valid_bits[5]                                                                                                                                                   ; system_0:u0|cpu_0:the_cpu_0|ic_fill_valid_bits[5]                                                                                                                                             ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|ic_fill_valid_bits[4]                                                                                                                                                   ; system_0:u0|cpu_0:the_cpu_0|ic_fill_valid_bits[4]                                                                                                                                             ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|ic_fill_valid_bits[3]                                                                                                                                                   ; system_0:u0|cpu_0:the_cpu_0|ic_fill_valid_bits[3]                                                                                                                                             ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|ic_fill_valid_bits[2]                                                                                                                                                   ; system_0:u0|cpu_0:the_cpu_0|ic_fill_valid_bits[2]                                                                                                                                             ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|ic_fill_valid_bits[1]                                                                                                                                                   ; system_0:u0|cpu_0:the_cpu_0|ic_fill_valid_bits[1]                                                                                                                                             ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|ic_fill_valid_bits[0]                                                                                                                                                   ; system_0:u0|cpu_0:the_cpu_0|ic_fill_valid_bits[0]                                                                                                                                             ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|A_dc_latest_data_valid_byte_0                                                                                                                                           ; system_0:u0|cpu_0:the_cpu_0|A_dc_latest_data_valid_byte_0                                                                                                                                     ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|ic_fill_dp_offset[1]                                                                                                                                                    ; system_0:u0|cpu_0:the_cpu_0|ic_fill_dp_offset[1]                                                                                                                                              ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|ic_fill_dp_offset[2]                                                                                                                                                    ; system_0:u0|cpu_0:the_cpu_0|ic_fill_dp_offset[2]                                                                                                                                              ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|A_dc_latest_data_valid                                                                                                                                                  ; system_0:u0|cpu_0:the_cpu_0|A_dc_latest_data_valid                                                                                                                                            ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|i_read                                                                                                                                                                  ; system_0:u0|cpu_0:the_cpu_0|i_read                                                                                                                                                            ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|cpu_0_instruction_master_latency_counter[1]                                                                            ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|cpu_0_instruction_master_latency_counter[1]                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|cpu_0_instruction_master_latency_counter[0]                                                                            ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|cpu_0_instruction_master_latency_counter[0]                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|A_mul_cnt[2]                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|A_mul_cnt[2]                                                                                                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|A_mul_cnt[0]                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|A_mul_cnt[0]                                                                                                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|A_mul_cnt[1]                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|A_mul_cnt[1]                                                                                                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|wait_for_one_post_bret_inst                                                                                                                                             ; system_0:u0|cpu_0:the_cpu_0|wait_for_one_post_bret_inst                                                                                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_nios2_oci_debug:the_cpu_0_nios2_oci_debug|jtag_break                                                                          ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_nios2_oci_debug:the_cpu_0_nios2_oci_debug|jtag_break                                                                    ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|latched_oci_tb_hbreak_req                                                                                                                                               ; system_0:u0|cpu_0:the_cpu_0|latched_oci_tb_hbreak_req                                                                                                                                         ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0_jtag_debug_module_arbitrator:the_cpu_0_jtag_debug_module|cpu_0_jtag_debug_module_arb_addend[1]                                                                                    ; system_0:u0|cpu_0_jtag_debug_module_arbitrator:the_cpu_0_jtag_debug_module|cpu_0_jtag_debug_module_arb_addend[1]                                                                              ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0_jtag_debug_module_arbitrator:the_cpu_0_jtag_debug_module|cpu_0_jtag_debug_module_arb_addend[0]                                                                                    ; system_0:u0|cpu_0_jtag_debug_module_arbitrator:the_cpu_0_jtag_debug_module|cpu_0_jtag_debug_module_arb_addend[0]                                                                              ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|ic_fill_dp_offset[0]                                                                                                                                                    ; system_0:u0|cpu_0:the_cpu_0|ic_fill_dp_offset[0]                                                                                                                                              ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|A_shift_rot_cnt                                                                                                                                                         ; system_0:u0|cpu_0:the_cpu_0|A_shift_rot_cnt                                                                                                                                                   ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_nios2_oci_debug:the_cpu_0_nios2_oci_debug|monitor_ready                                                                       ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_nios2_oci_debug:the_cpu_0_nios2_oci_debug|monitor_ready                                                                 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|ic_fill_line[2]                                                                                                                                                         ; system_0:u0|cpu_0:the_cpu_0|ic_fill_line[2]                                                                                                                                                   ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|ic_fill_line[1]                                                                                                                                                         ; system_0:u0|cpu_0:the_cpu_0|ic_fill_line[1]                                                                                                                                                   ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|ic_fill_line[0]                                                                                                                                                         ; system_0:u0|cpu_0:the_cpu_0|ic_fill_line[0]                                                                                                                                                   ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|ic_fill_ap_offset[2]                                                                                                                                                    ; system_0:u0|cpu_0:the_cpu_0|ic_fill_ap_offset[2]                                                                                                                                              ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|ic_fill_ap_offset[1]                                                                                                                                                    ; system_0:u0|cpu_0:the_cpu_0|ic_fill_ap_offset[1]                                                                                                                                              ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|ic_fill_ap_offset[0]                                                                                                                                                    ; system_0:u0|cpu_0:the_cpu_0|ic_fill_ap_offset[0]                                                                                                                                              ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|av_wr_done                                                                                                                                                              ; system_0:u0|cpu_0:the_cpu_0|av_wr_done                                                                                                                                                        ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_nios2_ocimem:the_cpu_0_nios2_ocimem|MonWr                                                                                     ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_nios2_ocimem:the_cpu_0_nios2_ocimem|MonWr                                                                               ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|ic_fill_prevent_refill                                                                                                                                                  ; system_0:u0|cpu_0:the_cpu_0|ic_fill_prevent_refill                                                                                                                                            ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|ic_fill_line[5]                                                                                                                                                         ; system_0:u0|cpu_0:the_cpu_0|ic_fill_line[5]                                                                                                                                                   ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|clock_0:the_clock_0|clock_0_slave_FSM:slave_FSM|slave_read_request                                                                                                                      ; system_0:u0|clock_0:the_clock_0|clock_0_slave_FSM:slave_FSM|slave_read_request                                                                                                                ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|clock_1:the_clock_1|clock_1_slave_FSM:slave_FSM|slave_read_request                                                                                                                      ; system_0:u0|clock_1:the_clock_1|clock_1_slave_FSM:slave_FSM|slave_read_request                                                                                                                ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|clock_1:the_clock_1|clock_1_slave_FSM:slave_FSM|slave_write_request                                                                                                                     ; system_0:u0|clock_1:the_clock_1|clock_1_slave_FSM:slave_FSM|slave_write_request                                                                                                               ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|A_mul_stall                                                                                                                                                             ; system_0:u0|cpu_0:the_cpu_0|A_mul_stall                                                                                                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|A_shift_rot_stall                                                                                                                                                       ; system_0:u0|cpu_0:the_cpu_0|A_shift_rot_stall                                                                                                                                                 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|ic_fill_active                                                                                                                                                          ; system_0:u0|cpu_0:the_cpu_0|ic_fill_active                                                                                                                                                    ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|ic_fill_line[6]                                                                                                                                                         ; system_0:u0|cpu_0:the_cpu_0|ic_fill_line[6]                                                                                                                                                   ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|ic_fill_line[4]                                                                                                                                                         ; system_0:u0|cpu_0:the_cpu_0|ic_fill_line[4]                                                                                                                                                   ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_nios2_oci_debug:the_cpu_0_nios2_oci_debug|monitor_error                                                                       ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_nios2_oci_debug:the_cpu_0_nios2_oci_debug|monitor_error                                                                 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|cpu_0:the_cpu_0|hbreak_enabled                                                                                                                                                          ; system_0:u0|cpu_0:the_cpu_0|hbreak_enabled                                                                                                                                                    ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.514 ns                                ; system_0:u0|cpu_0:the_cpu_0|A_rot[24]                                                                                                                                                               ; system_0:u0|cpu_0:the_cpu_0|A_shift_rot_result[24]                                                                                                                                            ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.530 ns                 ;
; 0.514 ns                                ; system_0:u0|cpu_0:the_cpu_0|A_rot[19]                                                                                                                                                               ; system_0:u0|cpu_0:the_cpu_0|A_shift_rot_result[19]                                                                                                                                            ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.530 ns                 ;
; 0.515 ns                                ; system_0:u0|cpu_0:the_cpu_0|E_control_rd_data_without_mmu_regs[1]                                                                                                                                   ; system_0:u0|cpu_0:the_cpu_0|M_control_rd_data[1]                                                                                                                                              ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.531 ns                 ;
; 0.515 ns                                ; system_0:u0|cpu_0:the_cpu_0|E_bht_ptr[5]                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|M_bht_ptr[5]                                                                                                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.531 ns                 ;
; 0.516 ns                                ; system_0:u0|cpu_0:the_cpu_0|E_control_rd_data_without_mmu_regs[0]                                                                                                                                   ; system_0:u0|cpu_0:the_cpu_0|M_control_rd_data[0]                                                                                                                                              ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.532 ns                 ;
; 0.516 ns                                ; system_0:u0|timer_0:the_timer_0|counter_snapshot[10]                                                                                                                                                ; system_0:u0|timer_0:the_timer_0|readdata[10]                                                                                                                                                  ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.532 ns                 ;
; 0.516 ns                                ; system_0:u0|timer_1:the_timer_1|counter_snapshot[8]                                                                                                                                                 ; system_0:u0|timer_1:the_timer_1|readdata[8]                                                                                                                                                   ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.532 ns                 ;
; 0.516 ns                                ; system_0:u0|cpu_0:the_cpu_0|M_rot_pass3                                                                                                                                                             ; system_0:u0|cpu_0:the_cpu_0|A_rot_pass3                                                                                                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.532 ns                 ;
; 0.516 ns                                ; system_0:u0|cpu_0:the_cpu_0|A_mul_stall_d1                                                                                                                                                          ; system_0:u0|cpu_0:the_cpu_0|A_mul_stall_d2                                                                                                                                                    ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.532 ns                 ;
; 0.516 ns                                ; system_0:u0|cpu_0:the_cpu_0|F_bht_ptr[6]                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|D_bht_ptr[6]                                                                                                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.532 ns                 ;
; 0.516 ns                                ; system_0:u0|cpu_0:the_cpu_0|E_bht_ptr[6]                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|M_bht_ptr[6]                                                                                                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.532 ns                 ;
; 0.516 ns                                ; system_0:u0|cpu_0:the_cpu_0|E_bht_ptr[0]                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|M_bht_ptr[0]                                                                                                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.532 ns                 ;
; 0.516 ns                                ; system_0:u0|cpu_0:the_cpu_0|A_st_data[9]                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|d_writedata[9]                                                                                                                                                    ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.532 ns                 ;
; 0.517 ns                                ; system_0:u0|cpu_0:the_cpu_0|M_src2[29]                                                                                                                                                              ; system_0:u0|cpu_0:the_cpu_0|A_mul_src2[29]                                                                                                                                                    ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.533 ns                 ;
; 0.517 ns                                ; system_0:u0|cpu_0:the_cpu_0|A_st_data[3]                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|d_writedata[3]                                                                                                                                                    ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.533 ns                 ;
; 0.517 ns                                ; system_0:u0|cpu_0:the_cpu_0|E_bht_ptr[7]                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|M_bht_ptr[7]                                                                                                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.533 ns                 ;
; 0.517 ns                                ; system_0:u0|cpu_0:the_cpu_0|A_st_data[15]                                                                                                                                                           ; system_0:u0|cpu_0:the_cpu_0|d_writedata[15]                                                                                                                                                   ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.533 ns                 ;
; 0.517 ns                                ; system_0:u0|cpu_0:the_cpu_0|A_st_data[13]                                                                                                                                                           ; system_0:u0|cpu_0:the_cpu_0|d_writedata[13]                                                                                                                                                   ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.533 ns                 ;
; 0.518 ns                                ; system_0:u0|timer_1:the_timer_1|counter_snapshot[11]                                                                                                                                                ; system_0:u0|timer_1:the_timer_1|readdata[11]                                                                                                                                                  ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.534 ns                 ;
; 0.518 ns                                ; system_0:u0|cpu_0:the_cpu_0|A_rot[5]                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|A_shift_rot_result[5]                                                                                                                                             ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.534 ns                 ;
; 0.518 ns                                ; system_0:u0|cpu_0:the_cpu_0|F_bht_ptr[1]                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|D_bht_ptr[1]                                                                                                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.534 ns                 ;
; 0.518 ns                                ; system_0:u0|cpu_0:the_cpu_0|D_bht_ptr[3]                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|E_bht_ptr[3]                                                                                                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.534 ns                 ;
; 0.519 ns                                ; system_0:u0|cpu_0:the_cpu_0|M_src2[19]                                                                                                                                                              ; system_0:u0|cpu_0:the_cpu_0|A_mul_src2[19]                                                                                                                                                    ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.535 ns                 ;
; 0.519 ns                                ; system_0:u0|cpu_0:the_cpu_0|F_bht_ptr[0]                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|D_bht_ptr[0]                                                                                                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.535 ns                 ;
; 0.519 ns                                ; system_0:u0|cpu_0:the_cpu_0|A_st_data[21]                                                                                                                                                           ; system_0:u0|cpu_0:the_cpu_0|d_writedata[21]                                                                                                                                                   ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.535 ns                 ;
; 0.520 ns                                ; system_0:u0|cpu_0:the_cpu_0|M_src2[21]                                                                                                                                                              ; system_0:u0|cpu_0:the_cpu_0|A_mul_src2[21]                                                                                                                                                    ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.536 ns                 ;
; 0.520 ns                                ; system_0:u0|cpu_0:the_cpu_0|F_bht_ptr[4]                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|D_bht_ptr[4]                                                                                                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.536 ns                 ;
; 0.520 ns                                ; system_0:u0|cpu_0:the_cpu_0|A_rot[25]                                                                                                                                                               ; system_0:u0|cpu_0:the_cpu_0|A_shift_rot_result[25]                                                                                                                                            ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.536 ns                 ;
; 0.520 ns                                ; system_0:u0|cpu_0:the_cpu_0|A_rot[16]                                                                                                                                                               ; system_0:u0|cpu_0:the_cpu_0|A_shift_rot_result[16]                                                                                                                                            ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.536 ns                 ;
; 0.520 ns                                ; system_0:u0|cpu_0:the_cpu_0|A_rot[4]                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|A_shift_rot_result[4]                                                                                                                                             ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.536 ns                 ;
; 0.520 ns                                ; system_0:u0|cpu_0:the_cpu_0|A_rot[20]                                                                                                                                                               ; system_0:u0|cpu_0:the_cpu_0|A_shift_rot_result[20]                                                                                                                                            ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.536 ns                 ;
; 0.520 ns                                ; system_0:u0|cpu_0:the_cpu_0|A_st_data[30]                                                                                                                                                           ; system_0:u0|cpu_0:the_cpu_0|d_writedata[30]                                                                                                                                                   ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.536 ns                 ;
; 0.520 ns                                ; system_0:u0|cpu_0:the_cpu_0|D_bht_ptr[2]                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|E_bht_ptr[2]                                                                                                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.536 ns                 ;
; 0.520 ns                                ; system_0:u0|cpu_0:the_cpu_0|E_bht_ptr[3]                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|M_bht_ptr[3]                                                                                                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.536 ns                 ;
; 0.520 ns                                ; system_0:u0|cpu_0:the_cpu_0|D_pc[18]                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|E_pc[18]                                                                                                                                                          ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.536 ns                 ;
; 0.520 ns                                ; system_0:u0|cpu_0:the_cpu_0|A_dc_victim_tag[1]                                                                                                                                                      ; system_0:u0|cpu_0:the_cpu_0|d_address[12]                                                                                                                                                     ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.536 ns                 ;
; 0.521 ns                                ; system_0:u0|jtag_uart_0:the_jtag_uart_0|jtag_uart_0_scfifo_r:the_jtag_uart_0_scfifo_r|scfifo:rfifo|scfifo_1n21:auto_generated|a_dpfifo_8t21:dpfifo|cntr_dl8:wr_ptr|safe_q[5]                        ; system_0:u0|jtag_uart_0:the_jtag_uart_0|jtag_uart_0_scfifo_r:the_jtag_uart_0_scfifo_r|scfifo:rfifo|scfifo_1n21:auto_generated|a_dpfifo_8t21:dpfifo|cntr_dl8:wr_ptr|safe_q[5]                  ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.537 ns                 ;
; 0.521 ns                                ; system_0:u0|cpu_0:the_cpu_0|M_src2[28]                                                                                                                                                              ; system_0:u0|cpu_0:the_cpu_0|A_mul_src2[28]                                                                                                                                                    ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.537 ns                 ;
; 0.521 ns                                ; system_0:u0|timer_0:the_timer_0|counter_snapshot[11]                                                                                                                                                ; system_0:u0|timer_0:the_timer_0|readdata[11]                                                                                                                                                  ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.537 ns                 ;
; 0.521 ns                                ; system_0:u0|cpu_0:the_cpu_0|A_dc_latest_data_byte_3[7]                                                                                                                                              ; system_0:u0|cpu_0:the_cpu_0|A_dc_victim_rd_data[31]                                                                                                                                           ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.537 ns                 ;
; 0.521 ns                                ; system_0:u0|cpu_0:the_cpu_0|A_rot[0]                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|A_shift_rot_result[0]                                                                                                                                             ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.537 ns                 ;
; 0.521 ns                                ; system_0:u0|cpu_0:the_cpu_0|A_st_data[24]                                                                                                                                                           ; system_0:u0|cpu_0:the_cpu_0|d_writedata[24]                                                                                                                                                   ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.537 ns                 ;
; 0.521 ns                                ; system_0:u0|cpu_0:the_cpu_0|A_st_data[7]                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|d_writedata[7]                                                                                                                                                    ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.537 ns                 ;
; 0.521 ns                                ; system_0:u0|cpu_0:the_cpu_0|A_dc_victim_tag[2]                                                                                                                                                      ; system_0:u0|cpu_0:the_cpu_0|d_address[13]                                                                                                                                                     ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.537 ns                 ;
; 0.522 ns                                ; system_0:u0|cpu_0:the_cpu_0|M_src2[16]                                                                                                                                                              ; system_0:u0|cpu_0:the_cpu_0|A_mul_src2[16]                                                                                                                                                    ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.538 ns                 ;
; 0.522 ns                                ; system_0:u0|timer_0:the_timer_0|counter_snapshot[9]                                                                                                                                                 ; system_0:u0|timer_0:the_timer_0|readdata[9]                                                                                                                                                   ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.538 ns                 ;
; 0.522 ns                                ; system_0:u0|cpu_0:the_cpu_0|A_st_data[27]                                                                                                                                                           ; system_0:u0|cpu_0:the_cpu_0|d_writedata[27]                                                                                                                                                   ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.538 ns                 ;
; 0.522 ns                                ; system_0:u0|cpu_0:the_cpu_0|A_st_data[6]                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|d_writedata[6]                                                                                                                                                    ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.538 ns                 ;
; 0.522 ns                                ; system_0:u0|cpu_0:the_cpu_0|F_bht_ptr[5]                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|D_bht_ptr[5]                                                                                                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.538 ns                 ;
; 0.522 ns                                ; system_0:u0|cpu_0:the_cpu_0|A_mul_stall_d2                                                                                                                                                          ; system_0:u0|cpu_0:the_cpu_0|A_mul_stall_d3                                                                                                                                                    ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.538 ns                 ;
; 0.522 ns                                ; system_0:u0|cpu_0:the_cpu_0|ic_fill_initial_offset[1]                                                                                                                                               ; system_0:u0|cpu_0:the_cpu_0|ic_fill_dp_offset[1]                                                                                                                                              ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.538 ns                 ;
; 0.522 ns                                ; system_0:u0|cpu_0:the_cpu_0|A_dc_victim_tag[3]                                                                                                                                                      ; system_0:u0|cpu_0:the_cpu_0|d_address[14]                                                                                                                                                     ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.538 ns                 ;
; 0.522 ns                                ; system_0:u0|system_0_reset_clk_domain_synch_module:system_0_reset_clk_domain_synch|data_in_d1                                                                                                       ; system_0:u0|system_0_reset_clk_domain_synch_module:system_0_reset_clk_domain_synch|data_out                                                                                                   ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.538 ns                 ;
; 0.523 ns                                ; system_0:u0|cpu_0:the_cpu_0|M_src1[7]                                                                                                                                                               ; system_0:u0|cpu_0:the_cpu_0|A_mul_src1[7]~_Duplicate_1                                                                                                                                        ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.539 ns                 ;
; 0.523 ns                                ; system_0:u0|cpu_0:the_cpu_0|M_src2[23]                                                                                                                                                              ; system_0:u0|cpu_0:the_cpu_0|A_mul_src2[23]                                                                                                                                                    ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.539 ns                 ;
; 0.523 ns                                ; system_0:u0|timer_1:the_timer_1|counter_snapshot[12]                                                                                                                                                ; system_0:u0|timer_1:the_timer_1|readdata[12]                                                                                                                                                  ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.539 ns                 ;
; 0.523 ns                                ; system_0:u0|cpu_0:the_cpu_0|F_bht_ptr[2]                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|D_bht_ptr[2]                                                                                                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.539 ns                 ;
; 0.523 ns                                ; system_0:u0|button_pio:the_button_pio|d2_data_in[3]                                                                                                                                                 ; system_0:u0|button_pio:the_button_pio|edge_capture[3]                                                                                                                                         ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.539 ns                 ;
; 0.523 ns                                ; system_0:u0|cpu_0:the_cpu_0|A_st_data[29]                                                                                                                                                           ; system_0:u0|cpu_0:the_cpu_0|d_writedata[29]                                                                                                                                                   ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.539 ns                 ;
; 0.523 ns                                ; system_0:u0|cpu_0:the_cpu_0|M_br_cond_taken_history[6]                                                                                                                                              ; system_0:u0|cpu_0:the_cpu_0|M_br_cond_taken_history[7]                                                                                                                                        ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.539 ns                 ;
; 0.523 ns                                ; system_0:u0|cpu_0:the_cpu_0|D_pc[13]                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|E_pc[13]                                                                                                                                                          ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.539 ns                 ;
; 0.523 ns                                ; system_0:u0|cpu_0:the_cpu_0|A_dc_victim_tag[7]                                                                                                                                                      ; system_0:u0|cpu_0:the_cpu_0|d_address[18]                                                                                                                                                     ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.539 ns                 ;
; 0.524 ns                                ; system_0:u0|cpu_0:the_cpu_0|A_dc_latest_data_byte_3[0]                                                                                                                                              ; system_0:u0|cpu_0:the_cpu_0|A_dc_victim_rd_data[24]                                                                                                                                           ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.540 ns                 ;
; 0.524 ns                                ; system_0:u0|cpu_0:the_cpu_0|M_st_data[7]                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|A_st_data[7]                                                                                                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.540 ns                 ;
; 0.524 ns                                ; system_0:u0|cpu_0:the_cpu_0|A_rot[23]                                                                                                                                                               ; system_0:u0|cpu_0:the_cpu_0|A_shift_rot_result[23]                                                                                                                                            ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.540 ns                 ;
; 0.524 ns                                ; system_0:u0|cpu_0:the_cpu_0|F_bht_ptr[7]                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|D_bht_ptr[7]                                                                                                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.540 ns                 ;
; 0.524 ns                                ; system_0:u0|cpu_0:the_cpu_0|ic_fill_initial_offset[0]                                                                                                                                               ; system_0:u0|cpu_0:the_cpu_0|ic_fill_dp_offset[0]                                                                                                                                              ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.540 ns                 ;
; 0.524 ns                                ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|dr_update2 ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|jxdr ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.540 ns                 ;
; 0.525 ns                                ; system_0:u0|cpu_0:the_cpu_0|M_src1[6]                                                                                                                                                               ; system_0:u0|cpu_0:the_cpu_0|A_mul_src1[6]~_Duplicate_1                                                                                                                                        ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.541 ns                 ;
; 0.525 ns                                ; system_0:u0|cpu_0:the_cpu_0|M_src2[17]                                                                                                                                                              ; system_0:u0|cpu_0:the_cpu_0|A_mul_src2[17]                                                                                                                                                    ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.541 ns                 ;
; 0.525 ns                                ; system_0:u0|cpu_0:the_cpu_0|M_rot_pass0                                                                                                                                                             ; system_0:u0|cpu_0:the_cpu_0|A_rot_pass0                                                                                                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.541 ns                 ;
; 0.525 ns                                ; system_0:u0|cpu_0:the_cpu_0|A_dc_victim_rd_data[2]                                                                                                                                                  ; system_0:u0|cpu_0:the_cpu_0|d_writedata[2]                                                                                                                                                    ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.541 ns                 ;
; 0.525 ns                                ; system_0:u0|cpu_0:the_cpu_0|M_ctrl_mul_lsw                                                                                                                                                          ; system_0:u0|cpu_0:the_cpu_0|A_ctrl_mul_lsw                                                                                                                                                    ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.541 ns                 ;
; 0.525 ns                                ; system_0:u0|cpu_0:the_cpu_0|E_src2_reg[19]                                                                                                                                                          ; system_0:u0|cpu_0:the_cpu_0|M_st_data[19]                                                                                                                                                     ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.541 ns                 ;
; 0.525 ns                                ; system_0:u0|cpu_0:the_cpu_0|M_st_data[12]                                                                                                                                                           ; system_0:u0|cpu_0:the_cpu_0|A_st_data[12]                                                                                                                                                     ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.541 ns                 ;
; 0.525 ns                                ; system_0:u0|cpu_0:the_cpu_0|A_shift_rot_stall                                                                                                                                                       ; system_0:u0|cpu_0:the_cpu_0|A_shift_rot_cnt                                                                                                                                                   ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.541 ns                 ;
; 0.525 ns                                ; system_0:u0|cpu_0:the_cpu_0|A_st_data[11]                                                                                                                                                           ; system_0:u0|cpu_0:the_cpu_0|d_writedata[11]                                                                                                                                                   ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.541 ns                 ;
; 0.525 ns                                ; system_0:u0|cpu_0:the_cpu_0|A_shift_rot_cnt                                                                                                                                                         ; system_0:u0|cpu_0:the_cpu_0|A_shift_rot_stall                                                                                                                                                 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.541 ns                 ;
; 0.526 ns                                ; system_0:u0|jtag_uart_0:the_jtag_uart_0|jtag_uart_0_scfifo_w:the_jtag_uart_0_scfifo_w|scfifo:wfifo|scfifo_1n21:auto_generated|a_dpfifo_8t21:dpfifo|cntr_dl8:rd_ptr_count|safe_q[5]                  ; system_0:u0|jtag_uart_0:the_jtag_uart_0|jtag_uart_0_scfifo_w:the_jtag_uart_0_scfifo_w|scfifo:wfifo|scfifo_1n21:auto_generated|a_dpfifo_8t21:dpfifo|cntr_dl8:rd_ptr_count|safe_q[5]            ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.542 ns                 ;
; 0.526 ns                                ; system_0:u0|jtag_uart_0:the_jtag_uart_0|jtag_uart_0_scfifo_r:the_jtag_uart_0_scfifo_r|scfifo:rfifo|scfifo_1n21:auto_generated|a_dpfifo_8t21:dpfifo|cntr_dl8:rd_ptr_count|safe_q[5]                  ; system_0:u0|jtag_uart_0:the_jtag_uart_0|jtag_uart_0_scfifo_r:the_jtag_uart_0_scfifo_r|scfifo:rfifo|scfifo_1n21:auto_generated|a_dpfifo_8t21:dpfifo|cntr_dl8:rd_ptr_count|safe_q[5]            ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.542 ns                 ;
; 0.526 ns                                ; system_0:u0|cpu_0:the_cpu_0|M_src2[30]                                                                                                                                                              ; system_0:u0|cpu_0:the_cpu_0|A_mul_src2[30]                                                                                                                                                    ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.542 ns                 ;
; 0.526 ns                                ; system_0:u0|cpu_0:the_cpu_0|D_bht_ptr[4]                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|E_bht_ptr[4]                                                                                                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.542 ns                 ;
; 0.526 ns                                ; system_0:u0|cpu_0:the_cpu_0|E_bht_ptr[4]                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|M_bht_ptr[4]                                                                                                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.542 ns                 ;
; 0.526 ns                                ; system_0:u0|cpu_0:the_cpu_0|M_ctrl_mul_lsw                                                                                                                                                          ; system_0:u0|cpu_0:the_cpu_0|A_mul_stall                                                                                                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.542 ns                 ;
; 0.527 ns                                ; system_0:u0|cpu_0:the_cpu_0|M_src2[24]                                                                                                                                                              ; system_0:u0|cpu_0:the_cpu_0|A_mul_src2[24]                                                                                                                                                    ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.543 ns                 ;
; 0.527 ns                                ; system_0:u0|cpu_0:the_cpu_0|M_src2[20]                                                                                                                                                              ; system_0:u0|cpu_0:the_cpu_0|A_mul_src2[20]                                                                                                                                                    ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.543 ns                 ;
; 0.527 ns                                ; system_0:u0|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|read_write2                                                                                                 ; system_0:u0|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|t_ena~reg0                                                                                            ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.543 ns                 ;
; 0.527 ns                                ; system_0:u0|cpu_0:the_cpu_0|E_src2_reg[11]                                                                                                                                                          ; system_0:u0|cpu_0:the_cpu_0|M_st_data[27]                                                                                                                                                     ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.543 ns                 ;
; 0.527 ns                                ; system_0:u0|clock_1:the_clock_1|slave_readdata[14]                                                                                                                                                  ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[14]                                                                                                       ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.543 ns                 ;
; 0.527 ns                                ; system_0:u0|clock_1:the_clock_1|slave_readdata[5]                                                                                                                                                   ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[5]                                                                                                        ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.543 ns                 ;
; 0.527 ns                                ; system_0:u0|cpu_0:the_cpu_0|M_st_data[28]                                                                                                                                                           ; system_0:u0|cpu_0:the_cpu_0|A_st_data[28]                                                                                                                                                     ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.543 ns                 ;
; 0.527 ns                                ; system_0:u0|cpu_0:the_cpu_0|A_rot[31]                                                                                                                                                               ; system_0:u0|cpu_0:the_cpu_0|A_shift_rot_result[31]                                                                                                                                            ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.543 ns                 ;
; 0.527 ns                                ; system_0:u0|cpu_0:the_cpu_0|D_pc[21]                                                                                                                                                                ; system_0:u0|cpu_0:the_cpu_0|E_pc[21]                                                                                                                                                          ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.543 ns                 ;
; 0.527 ns                                ; system_0:u0|cpu_0:the_cpu_0|D_pc[7]                                                                                                                                                                 ; system_0:u0|cpu_0:the_cpu_0|E_pc[7]                                                                                                                                                           ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.543 ns                 ;
; 0.528 ns                                ; system_0:u0|clock_1:the_clock_1|slave_readdata[13]                                                                                                                                                  ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|registered_cpu_0_data_master_readdata[29]                                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.544 ns                 ;
; 0.528 ns                                ; system_0:u0|clock_1:the_clock_1|slave_readdata[14]                                                                                                                                                  ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|registered_cpu_0_data_master_readdata[30]                                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.544 ns                 ;
; 0.528 ns                                ; system_0:u0|clock_1:the_clock_1|slave_readdata[0]                                                                                                                                                   ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|registered_cpu_0_data_master_readdata[16]                                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.544 ns                 ;
; 0.528 ns                                ; system_0:u0|cpu_0:the_cpu_0|M_br_cond_taken_history[2]                                                                                                                                              ; system_0:u0|cpu_0:the_cpu_0|M_br_cond_taken_history[3]                                                                                                                                        ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.544 ns                 ;
; 0.528 ns                                ; system_0:u0|cpu_0:the_cpu_0|ic_fill_initial_offset[2]                                                                                                                                               ; system_0:u0|cpu_0:the_cpu_0|ic_fill_dp_offset[2]                                                                                                                                              ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.544 ns                 ;
; 0.528 ns                                ; system_0:u0|cpu_0:the_cpu_0|A_mul_cnt[1]                                                                                                                                                            ; system_0:u0|cpu_0:the_cpu_0|A_mul_cnt[2]                                                                                                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.544 ns                 ;
; 0.530 ns                                ; system_0:u0|clock_1:the_clock_1|slave_readdata[11]                                                                                                                                                  ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|registered_cpu_0_data_master_readdata[27]                                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.546 ns                 ;
; 0.530 ns                                ; system_0:u0|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|jupdate1                                                                                                    ; system_0:u0|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|jupdate2                                                                                              ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.546 ns                 ;
; 0.530 ns                                ; system_0:u0|clock_1:the_clock_1|slave_readdata[0]                                                                                                                                                   ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[0]                                                                                                        ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.546 ns                 ;
; 0.531 ns                                ; system_0:u0|jtag_uart_0:the_jtag_uart_0|jtag_uart_0_scfifo_w:the_jtag_uart_0_scfifo_w|scfifo:wfifo|scfifo_1n21:auto_generated|a_dpfifo_8t21:dpfifo|cntr_dl8:wr_ptr|safe_q[5]                        ; system_0:u0|jtag_uart_0:the_jtag_uart_0|jtag_uart_0_scfifo_w:the_jtag_uart_0_scfifo_w|scfifo:wfifo|scfifo_1n21:auto_generated|a_dpfifo_8t21:dpfifo|cntr_dl8:wr_ptr|safe_q[5]                  ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.547 ns                 ;
; 0.531 ns                                ; system_0:u0|timer_0:the_timer_0|internal_counter[31]                                                                                                                                                ; system_0:u0|timer_0:the_timer_0|internal_counter[31]                                                                                                                                          ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.547 ns                 ;
; 0.531 ns                                ; system_0:u0|timer_1:the_timer_1|internal_counter[31]                                                                                                                                                ; system_0:u0|timer_1:the_timer_1|internal_counter[31]                                                                                                                                          ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.547 ns                 ;
; 0.531 ns                                ; system_0:u0|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|jupdate1                                                                                                    ; system_0:u0|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|t_pause~reg0                                                                                          ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.547 ns                 ;
; 0.531 ns                                ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[13]                                                                                                             ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|registered_cpu_0_data_master_readdata[13]                                                                                      ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; SDRAM_PLL:PLL1|altpll:altpll_component|_clk1 ; 0.000 ns                   ; 0.016 ns                   ; 0.547 ns                 ;
; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu)                                                                                                                                                 ;                                                                                                                                                                                               ;                                              ;                                              ;                            ;                            ;                          ;
+-----------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------+----------------------------------------------+----------------------------+----------------------------+--------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Hold: 'CLOCK_50'                                                                                                                                                                                                                                                                                                                                                                                                                                                     ;
+-----------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------+------------+----------+----------------------------+----------------------------+--------------------------+
; Minimum Slack                           ; From                                                                                                                                                   ; To                                                                                                                                                         ; From Clock ; To Clock ; Required Hold Relationship ; Required Shortest P2P Time ; Actual Shortest P2P Time ;
+-----------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------+------------+----------+----------------------------+----------------------------+--------------------------+
; 0.391 ns                                ; system_0:u0|sdram_0:the_sdram_0|i_cmd[3]                                                                                                               ; system_0:u0|sdram_0:the_sdram_0|i_cmd[3]                                                                                                                   ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; I2C_AV_Config:u1|I2C_Controller:u0|SCLK                                                                                                                ; I2C_AV_Config:u1|I2C_Controller:u0|SCLK                                                                                                                    ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; I2C_AV_Config:u1|mI2C_DATA[22]                                                                                                                         ; I2C_AV_Config:u1|mI2C_DATA[22]                                                                                                                             ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; I2C_AV_Config:u1|I2C_Controller:u0|SDO                                                                                                                 ; I2C_AV_Config:u1|I2C_Controller:u0|SDO                                                                                                                     ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; I2C_AV_Config:u1|I2C_Controller:u0|ACK1                                                                                                                ; I2C_AV_Config:u1|I2C_Controller:u0|ACK1                                                                                                                    ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; I2C_AV_Config:u1|I2C_Controller:u0|ACK2                                                                                                                ; I2C_AV_Config:u1|I2C_Controller:u0|ACK2                                                                                                                    ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; I2C_AV_Config:u1|I2C_Controller:u0|ACK3                                                                                                                ; I2C_AV_Config:u1|I2C_Controller:u0|ACK3                                                                                                                    ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; I2C_AV_Config:u1|LUT_INDEX[0]                                                                                                                          ; I2C_AV_Config:u1|LUT_INDEX[0]                                                                                                                              ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; I2C_AV_Config:u1|mSetup_ST.0001                                                                                                                        ; I2C_AV_Config:u1|mSetup_ST.0001                                                                                                                            ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; I2C_AV_Config:u1|I2C_Controller:u0|END                                                                                                                 ; I2C_AV_Config:u1|I2C_Controller:u0|END                                                                                                                     ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; I2C_AV_Config:u1|mI2C_CTRL_CLK                                                                                                                         ; I2C_AV_Config:u1|mI2C_CTRL_CLK                                                                                                                             ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; I2C_AV_Config:u1|mI2C_GO                                                                                                                               ; I2C_AV_Config:u1|mI2C_GO                                                                                                                                   ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|clock_1:the_clock_1|clock_1_master_FSM:master_FSM|master_read_done                                                                         ; system_0:u0|clock_1:the_clock_1|clock_1_master_FSM:master_FSM|master_read_done                                                                             ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|clock_1:the_clock_1|clock_1_master_FSM:master_FSM|master_write_done                                                                        ; system_0:u0|clock_1:the_clock_1|clock_1_master_FSM:master_FSM|master_write_done                                                                            ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|sdram_0:the_sdram_0|i_cmd[1]                                                                                                               ; system_0:u0|sdram_0:the_sdram_0|i_cmd[1]                                                                                                                   ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_read_done                                                                         ; system_0:u0|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_read_done                                                                             ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|sdram_0:the_sdram_0|i_cmd[2]                                                                                                               ; system_0:u0|sdram_0:the_sdram_0|i_cmd[2]                                                                                                                   ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_0_out_to_sdram_0_s1_module:rdv_fifo_for_clock_0_out_to_sdram_0_s1|how_many_ones[1] ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_0_out_to_sdram_0_s1_module:rdv_fifo_for_clock_0_out_to_sdram_0_s1|how_many_ones[1]     ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_0_out_to_sdram_0_s1_module:rdv_fifo_for_clock_0_out_to_sdram_0_s1|how_many_ones[3] ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_0_out_to_sdram_0_s1_module:rdv_fifo_for_clock_0_out_to_sdram_0_s1|how_many_ones[3]     ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_0_out_to_sdram_0_s1_module:rdv_fifo_for_clock_0_out_to_sdram_0_s1|how_many_ones[2] ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_0_out_to_sdram_0_s1_module:rdv_fifo_for_clock_0_out_to_sdram_0_s1|how_many_ones[2]     ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_0_out_to_sdram_0_s1_module:rdv_fifo_for_clock_0_out_to_sdram_0_s1|how_many_ones[0] ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_0_out_to_sdram_0_s1_module:rdv_fifo_for_clock_0_out_to_sdram_0_s1|how_many_ones[0]     ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_1_out_to_sdram_0_s1_module:rdv_fifo_for_clock_1_out_to_sdram_0_s1|how_many_ones[3] ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_1_out_to_sdram_0_s1_module:rdv_fifo_for_clock_1_out_to_sdram_0_s1|how_many_ones[3]     ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_1_out_to_sdram_0_s1_module:rdv_fifo_for_clock_1_out_to_sdram_0_s1|how_many_ones[1] ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_1_out_to_sdram_0_s1_module:rdv_fifo_for_clock_1_out_to_sdram_0_s1|how_many_ones[1]     ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_1_out_to_sdram_0_s1_module:rdv_fifo_for_clock_1_out_to_sdram_0_s1|how_many_ones[0] ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_1_out_to_sdram_0_s1_module:rdv_fifo_for_clock_1_out_to_sdram_0_s1|how_many_ones[0]     ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_1_out_to_sdram_0_s1_module:rdv_fifo_for_clock_1_out_to_sdram_0_s1|how_many_ones[2] ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_1_out_to_sdram_0_s1_module:rdv_fifo_for_clock_1_out_to_sdram_0_s1|how_many_ones[2]     ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|sdram_0:the_sdram_0|i_refs[0]                                                                                                              ; system_0:u0|sdram_0:the_sdram_0|i_refs[0]                                                                                                                  ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|sdram_0:the_sdram_0|i_refs[2]                                                                                                              ; system_0:u0|sdram_0:the_sdram_0|i_refs[2]                                                                                                                  ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|sdram_0:the_sdram_0|i_refs[1]                                                                                                              ; system_0:u0|sdram_0:the_sdram_0|i_refs[1]                                                                                                                  ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|sdram_0:the_sdram_0|i_count[0]                                                                                                             ; system_0:u0|sdram_0:the_sdram_0|i_count[0]                                                                                                                 ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|sdram_0_s1_saved_chosen_master_vector[0]                                                              ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|sdram_0_s1_saved_chosen_master_vector[0]                                                                  ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state.001                                                                         ; system_0:u0|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state.001                                                                             ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|clock_1:the_clock_1|clock_1_master_FSM:master_FSM|master_state.001                                                                         ; system_0:u0|clock_1:the_clock_1|clock_1_master_FSM:master_FSM|master_state.001                                                                             ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; Reset_Delay:delay1|Cont[0]                                                                                                                             ; Reset_Delay:delay1|Cont[0]                                                                                                                                 ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|sdram_0:the_sdram_0|i_next.111                                                                                                             ; system_0:u0|sdram_0:the_sdram_0|i_next.111                                                                                                                 ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state.010                                                                         ; system_0:u0|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state.010                                                                             ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|clock_1:the_clock_1|clock_1_master_FSM:master_FSM|master_state.010                                                                         ; system_0:u0|clock_1:the_clock_1|clock_1_master_FSM:master_FSM|master_state.010                                                                             ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state.100                                                                         ; system_0:u0|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state.100                                                                             ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|clock_1:the_clock_1|clock_1_master_FSM:master_FSM|master_state.100                                                                         ; system_0:u0|clock_1:the_clock_1|clock_1_master_FSM:master_FSM|master_state.100                                                                             ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|sdram_0:the_sdram_0|i_next.000                                                                                                             ; system_0:u0|sdram_0:the_sdram_0|i_next.000                                                                                                                 ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|sdram_0:the_sdram_0|i_next.010                                                                                                             ; system_0:u0|sdram_0:the_sdram_0|i_next.010                                                                                                                 ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|sdram_0:the_sdram_0|i_count[1]                                                                                                             ; system_0:u0|sdram_0:the_sdram_0|i_count[1]                                                                                                                 ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|sdram_0:the_sdram_0|i_count[2]                                                                                                             ; system_0:u0|sdram_0:the_sdram_0|i_count[2]                                                                                                                 ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|sdram_0:the_sdram_0|m_next.010000000                                                                                                       ; system_0:u0|sdram_0:the_sdram_0|m_next.010000000                                                                                                           ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|sdram_0:the_sdram_0|i_next.101                                                                                                             ; system_0:u0|sdram_0:the_sdram_0|i_next.101                                                                                                                 ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_read                                                                              ; system_0:u0|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_read                                                                                  ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|clock_1:the_clock_1|clock_1_master_FSM:master_FSM|master_read                                                                              ; system_0:u0|clock_1:the_clock_1|clock_1_master_FSM:master_FSM|master_read                                                                                  ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|wr_address                                                   ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|wr_address                                                       ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_write                                                                             ; system_0:u0|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_write                                                                                 ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|clock_1:the_clock_1|clock_1_master_FSM:master_FSM|master_write                                                                             ; system_0:u0|clock_1:the_clock_1|clock_1_master_FSM:master_FSM|master_write                                                                                 ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|sdram_0:the_sdram_0|i_state.000                                                                                                            ; system_0:u0|sdram_0:the_sdram_0|i_state.000                                                                                                                ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|sdram_0:the_sdram_0|ack_refresh_request                                                                                                    ; system_0:u0|sdram_0:the_sdram_0|ack_refresh_request                                                                                                        ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|sdram_0:the_sdram_0|i_state.101                                                                                                            ; system_0:u0|sdram_0:the_sdram_0|i_state.101                                                                                                                ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|sdram_0:the_sdram_0|m_state.000100000                                                                                                      ; system_0:u0|sdram_0:the_sdram_0|m_state.000100000                                                                                                          ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|sdram_0:the_sdram_0|m_count[1]                                                                                                             ; system_0:u0|sdram_0:the_sdram_0|m_count[1]                                                                                                                 ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address                                                   ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address                                                       ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|sdram_0:the_sdram_0|refresh_request                                                                                                        ; system_0:u0|sdram_0:the_sdram_0|refresh_request                                                                                                            ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|sdram_0:the_sdram_0|i_cmd[0]                                                                                                               ; system_0:u0|sdram_0:the_sdram_0|i_cmd[0]                                                                                                                   ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|sdram_0:the_sdram_0|init_done                                                                                                              ; system_0:u0|sdram_0:the_sdram_0|init_done                                                                                                                  ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entries[0]                                                   ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entries[0]                                                       ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entries[1]                                                   ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entries[1]                                                       ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.391 ns                                ; system_0:u0|sdram_0:the_sdram_0|m_state.000000001                                                                                                      ; system_0:u0|sdram_0:the_sdram_0|m_state.000000001                                                                                                          ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.407 ns                 ;
; 0.516 ns                                ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[25]                                                  ; system_0:u0|sdram_0:the_sdram_0|active_addr[7]                                                                                                             ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.532 ns                 ;
; 0.516 ns                                ; system_0:u0|clock_0:the_clock_0|master_address[21]                                                                                                     ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[38]                                                      ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.532 ns                 ;
; 0.517 ns                                ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[37]                                                  ; system_0:u0|sdram_0:the_sdram_0|active_addr[19]                                                                                                            ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.533 ns                 ;
; 0.519 ns                                ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_0_out_to_sdram_0_s1_module:rdv_fifo_for_clock_0_out_to_sdram_0_s1|stage_2          ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_0_out_to_sdram_0_s1_module:rdv_fifo_for_clock_0_out_to_sdram_0_s1|stage_1              ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.535 ns                 ;
; 0.520 ns                                ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[0]                                                   ; system_0:u0|sdram_0:the_sdram_0|active_data[0]                                                                                                             ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.536 ns                 ;
; 0.520 ns                                ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_1_out_to_sdram_0_s1_module:rdv_fifo_for_clock_1_out_to_sdram_0_s1|stage_2          ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_1_out_to_sdram_0_s1_module:rdv_fifo_for_clock_1_out_to_sdram_0_s1|stage_1              ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.536 ns                 ;
; 0.520 ns                                ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[30]                                                  ; system_0:u0|sdram_0:the_sdram_0|active_addr[12]                                                                                                            ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.536 ns                 ;
; 0.520 ns                                ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[40]                                                  ; system_0:u0|sdram_0:the_sdram_0|active_rnw                                                                                                                 ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.536 ns                 ;
; 0.520 ns                                ; system_0:u0|sdram_0:the_sdram_0|ack_refresh_request                                                                                                    ; system_0:u0|sdram_0:the_sdram_0|refresh_request                                                                                                            ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.536 ns                 ;
; 0.521 ns                                ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[23]                                                  ; system_0:u0|sdram_0:the_sdram_0|active_addr[5]                                                                                                             ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.537 ns                 ;
; 0.521 ns                                ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[27]                                                  ; system_0:u0|sdram_0:the_sdram_0|active_addr[9]                                                                                                             ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.537 ns                 ;
; 0.522 ns                                ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[17]                                                  ; system_0:u0|sdram_0:the_sdram_0|active_dqm[1]                                                                                                              ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.538 ns                 ;
; 0.522 ns                                ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[31]                                                  ; system_0:u0|sdram_0:the_sdram_0|active_addr[13]                                                                                                            ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.538 ns                 ;
; 0.523 ns                                ; system_0:u0|clock_0:the_clock_0|master_address[6]                                                                                                      ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[23]                                                      ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.539 ns                 ;
; 0.523 ns                                ; system_0:u0|clock_0:the_clock_0|master_address[3]                                                                                                      ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[20]                                                      ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.539 ns                 ;
; 0.523 ns                                ; system_0:u0|clock_0:the_clock_0|master_writedata[3]                                                                                                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[3]                                                       ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.539 ns                 ;
; 0.523 ns                                ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_0_out_to_sdram_0_s1_module:rdv_fifo_for_clock_0_out_to_sdram_0_s1|stage_4          ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_0_out_to_sdram_0_s1_module:rdv_fifo_for_clock_0_out_to_sdram_0_s1|stage_3              ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.539 ns                 ;
; 0.523 ns                                ; system_0:u0|clock_0:the_clock_0|master_address[19]                                                                                                     ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[36]                                                      ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.539 ns                 ;
; 0.524 ns                                ; system_0:u0|clock_0:the_clock_0|master_address[5]                                                                                                      ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[22]                                                      ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.540 ns                 ;
; 0.524 ns                                ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_1_out_to_sdram_0_s1_module:rdv_fifo_for_clock_1_out_to_sdram_0_s1|stage_4          ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_1_out_to_sdram_0_s1_module:rdv_fifo_for_clock_1_out_to_sdram_0_s1|stage_3              ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.540 ns                 ;
; 0.524 ns                                ; system_0:u0|clock_0:the_clock_0|master_address[9]                                                                                                      ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[26]                                                      ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.540 ns                 ;
; 0.524 ns                                ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[35]                                                  ; system_0:u0|sdram_0:the_sdram_0|active_addr[17]                                                                                                            ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.540 ns                 ;
; 0.525 ns                                ; system_0:u0|clock_0:the_clock_0|master_writedata[0]                                                                                                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[0]                                                       ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.541 ns                 ;
; 0.525 ns                                ; system_0:u0|clock_0:the_clock_0|master_address[13]                                                                                                     ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30]                                                      ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.541 ns                 ;
; 0.526 ns                                ; system_0:u0|clock_0:the_clock_0|master_byteenable[1]                                                                                                   ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[17]                                                      ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.542 ns                 ;
; 0.526 ns                                ; system_0:u0|clock_0:the_clock_0|master_address[7]                                                                                                      ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[24]                                                      ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.542 ns                 ;
; 0.526 ns                                ; system_0:u0|clock_0:the_clock_0|master_address[4]                                                                                                      ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[21]                                                      ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.542 ns                 ;
; 0.526 ns                                ; system_0:u0|clock_0:the_clock_0|master_writedata[2]                                                                                                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[2]                                                       ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.542 ns                 ;
; 0.526 ns                                ; system_0:u0|clock_1:the_clock_1|clock_1_master_FSM:master_FSM|master_state.100                                                                         ; system_0:u0|clock_1:the_clock_1|clock_1_master_FSM:master_FSM|master_write_done                                                                            ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.542 ns                 ;
; 0.526 ns                                ; system_0:u0|sdram_0:the_sdram_0|i_next.101                                                                                                             ; system_0:u0|sdram_0:the_sdram_0|i_state.101                                                                                                                ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.542 ns                 ;
; 0.527 ns                                ; system_0:u0|clock_0:the_clock_0|master_address[8]                                                                                                      ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[25]                                                      ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.543 ns                 ;
; 0.527 ns                                ; system_0:u0|clock_1:the_clock_1|clock_1_master_FSM:master_FSM|master_state.010                                                                         ; system_0:u0|clock_1:the_clock_1|clock_1_master_FSM:master_FSM|master_read_done                                                                             ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.543 ns                 ;
; 0.528 ns                                ; system_0:u0|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state.010                                                                         ; system_0:u0|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_read_done                                                                             ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.544 ns                 ;
; 0.529 ns                                ; system_0:u0|sdram_0:the_sdram_0|i_state.111                                                                                                            ; system_0:u0|sdram_0:the_sdram_0|i_state.011                                                                                                                ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.545 ns                 ;
; 0.530 ns                                ; system_0:u0|sdram_0:the_sdram_0|rd_valid[1]                                                                                                            ; system_0:u0|sdram_0:the_sdram_0|rd_valid[2]                                                                                                                ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.546 ns                 ;
; 0.531 ns                                ; I2C_AV_Config:u1|mI2C_CLK_DIV[15]                                                                                                                      ; I2C_AV_Config:u1|mI2C_CLK_DIV[15]                                                                                                                          ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.547 ns                 ;
; 0.531 ns                                ; system_0:u0|sdram_0:the_sdram_0|i_state.111                                                                                                            ; system_0:u0|sdram_0:the_sdram_0|i_count[2]                                                                                                                 ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.547 ns                 ;
; 0.532 ns                                ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_1_out_to_sdram_0_s1_module:rdv_fifo_for_clock_1_out_to_sdram_0_s1|full_0           ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_1_out_to_sdram_0_s1_module:rdv_fifo_for_clock_1_out_to_sdram_0_s1|full_1               ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.548 ns                 ;
; 0.534 ns                                ; Reset_Delay:delay1|Cont[23]                                                                                                                            ; Reset_Delay:delay1|Cont[23]                                                                                                                                ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.550 ns                 ;
; 0.534 ns                                ; system_0:u0|sdram_0:the_sdram_0|m_next.000000001                                                                                                       ; system_0:u0|sdram_0:the_sdram_0|m_state.000000001                                                                                                          ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.550 ns                 ;
; 0.536 ns                                ; I2C_AV_Config:u1|I2C_Controller:u0|SD_COUNTER[5]                                                                                                       ; I2C_AV_Config:u1|I2C_Controller:u0|SD_COUNTER[5]                                                                                                           ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.552 ns                 ;
; 0.540 ns                                ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_1_out_to_sdram_0_s1_module:rdv_fifo_for_clock_1_out_to_sdram_0_s1|full_6           ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_1_out_to_sdram_0_s1_module:rdv_fifo_for_clock_1_out_to_sdram_0_s1|full_5               ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.556 ns                 ;
; 0.542 ns                                ; system_0:u0|sdram_0:the_sdram_0|m_cmd[1]~_Duplicate_1                                                                                                  ; system_0:u0|sdram_0:the_sdram_0|rd_valid[0]                                                                                                                ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.558 ns                 ;
; 0.551 ns                                ; system_0:u0|sdram_0:the_sdram_0|i_refs[0]                                                                                                              ; system_0:u0|sdram_0:the_sdram_0|i_refs[1]                                                                                                                  ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.567 ns                 ;
; 0.554 ns                                ; system_0:u0|sdram_0:the_sdram_0|i_count[1]                                                                                                             ; system_0:u0|sdram_0:the_sdram_0|i_state.010                                                                                                                ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.570 ns                 ;
; 0.555 ns                                ; I2C_AV_Config:u1|mSetup_ST.0001                                                                                                                        ; I2C_AV_Config:u1|mSetup_ST.0000                                                                                                                            ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.571 ns                 ;
; 0.556 ns                                ; I2C_AV_Config:u1|I2C_Controller:u0|END                                                                                                                 ; I2C_AV_Config:u1|mSetup_ST.0001                                                                                                                            ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.572 ns                 ;
; 0.559 ns                                ; I2C_AV_Config:u1|mSetup_ST.0001                                                                                                                        ; I2C_AV_Config:u1|mI2C_GO                                                                                                                                   ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.575 ns                 ;
; 0.560 ns                                ; I2C_AV_Config:u1|mSetup_ST.0001                                                                                                                        ; I2C_AV_Config:u1|mSetup_ST.0010                                                                                                                            ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.576 ns                 ;
; 0.562 ns                                ; system_0:u0|sdram_0:the_sdram_0|i_count[1]                                                                                                             ; system_0:u0|sdram_0:the_sdram_0|i_state.111                                                                                                                ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.578 ns                 ;
; 0.562 ns                                ; system_0:u0|system_0_reset_clk_50_domain_synch_module:system_0_reset_clk_50_domain_synch|data_out                                                      ; system_0:u0|sdram_0:the_sdram_0|active_cs_n                                                                                                                ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.578 ns                 ;
; 0.564 ns                                ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entries[1]                                                   ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|wr_address                                                       ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.580 ns                 ;
; 0.564 ns                                ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entries[1]                                                   ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entries[0]                                                       ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.580 ns                 ;
; 0.573 ns                                ; system_0:u0|sdram_0:the_sdram_0|i_state.000                                                                                                            ; system_0:u0|sdram_0:the_sdram_0|i_cmd[3]                                                                                                                   ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.589 ns                 ;
; 0.577 ns                                ; system_0:u0|sdram_0:the_sdram_0|i_state.000                                                                                                            ; system_0:u0|sdram_0:the_sdram_0|i_state.001                                                                                                                ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.593 ns                 ;
; 0.578 ns                                ; system_0:u0|sdram_0:the_sdram_0|i_state.101                                                                                                            ; system_0:u0|sdram_0:the_sdram_0|init_done                                                                                                                  ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.594 ns                 ;
; 0.579 ns                                ; system_0:u0|sdram_0:the_sdram_0|i_state.101                                                                                                            ; system_0:u0|sdram_0:the_sdram_0|i_cmd[1]                                                                                                                   ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.595 ns                 ;
; 0.580 ns                                ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_1_out_to_sdram_0_s1_module:rdv_fifo_for_clock_1_out_to_sdram_0_s1|full_5           ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_1_out_to_sdram_0_s1_module:rdv_fifo_for_clock_1_out_to_sdram_0_s1|full_4               ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.596 ns                 ;
; 0.582 ns                                ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|sdram_0_s1_arb_addend[1]                                                                              ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_0_out_to_sdram_0_s1_module:rdv_fifo_for_clock_0_out_to_sdram_0_s1|stage_6              ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.598 ns                 ;
; 0.583 ns                                ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|sdram_0_s1_arb_addend[1]                                                                              ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_1_out_to_sdram_0_s1_module:rdv_fifo_for_clock_1_out_to_sdram_0_s1|stage_6              ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.599 ns                 ;
; 0.586 ns                                ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_1_out_to_sdram_0_s1_module:rdv_fifo_for_clock_1_out_to_sdram_0_s1|full_5           ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_1_out_to_sdram_0_s1_module:rdv_fifo_for_clock_1_out_to_sdram_0_s1|full_6               ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.602 ns                 ;
; 0.650 ns                                ; system_0:u0|sdram_0:the_sdram_0|i_next.010                                                                                                             ; system_0:u0|sdram_0:the_sdram_0|i_state.010                                                                                                                ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.666 ns                 ;
; 0.656 ns                                ; system_0:u0|sdram_0:the_sdram_0|i_state.010                                                                                                            ; system_0:u0|sdram_0:the_sdram_0|i_state.011                                                                                                                ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.672 ns                 ;
; 0.661 ns                                ; system_0:u0|clock_0:the_clock_0|clock_0_slave_write_request_sync_module:clock_0_slave_write_request_sync|data_in_d1                                    ; system_0:u0|clock_0:the_clock_0|clock_0_slave_write_request_sync_module:clock_0_slave_write_request_sync|data_out                                          ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.677 ns                 ;
; 0.662 ns                                ; system_0:u0|clock_1:the_clock_1|clock_1_slave_read_request_sync_module:clock_1_slave_read_request_sync|data_in_d1                                      ; system_0:u0|clock_1:the_clock_1|clock_1_slave_read_request_sync_module:clock_1_slave_read_request_sync|data_out                                            ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.678 ns                 ;
; 0.662 ns                                ; system_0:u0|clock_1:the_clock_1|clock_1_slave_write_request_sync_module:clock_1_slave_write_request_sync|data_in_d1                                    ; system_0:u0|clock_1:the_clock_1|clock_1_slave_write_request_sync_module:clock_1_slave_write_request_sync|data_out                                          ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.678 ns                 ;
; 0.663 ns                                ; system_0:u0|sdram_0:the_sdram_0|rd_valid[2]                                                                                                            ; system_0:u0|sdram_0:the_sdram_0|za_valid                                                                                                                   ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.679 ns                 ;
; 0.664 ns                                ; system_0:u0|system_0_reset_clk_50_domain_synch_module:system_0_reset_clk_50_domain_synch|data_in_d1                                                    ; system_0:u0|system_0_reset_clk_50_domain_synch_module:system_0_reset_clk_50_domain_synch|data_out                                                          ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.680 ns                 ;
; 0.665 ns                                ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_1_out_to_sdram_0_s1_module:rdv_fifo_for_clock_1_out_to_sdram_0_s1|full_2           ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_1_out_to_sdram_0_s1_module:rdv_fifo_for_clock_1_out_to_sdram_0_s1|full_1               ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.681 ns                 ;
; 0.666 ns                                ; system_0:u0|clock_1:the_clock_1|clock_1_slave_read_request_sync_module:clock_1_slave_read_request_sync|data_out                                        ; system_0:u0|clock_1:the_clock_1|clock_1_edge_to_pulse:read_request_edge_to_pulse|data_in_d1                                                                ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.682 ns                 ;
; 0.669 ns                                ; system_0:u0|sdram_0:the_sdram_0|i_next.111                                                                                                             ; system_0:u0|sdram_0:the_sdram_0|i_state.111                                                                                                                ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.685 ns                 ;
; 0.670 ns                                ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[1]                                                   ; system_0:u0|sdram_0:the_sdram_0|active_data[1]                                                                                                             ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.015 ns                   ; 0.685 ns                 ;
; 0.670 ns                                ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_1_out_to_sdram_0_s1_module:rdv_fifo_for_clock_1_out_to_sdram_0_s1|full_2           ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_1_out_to_sdram_0_s1_module:rdv_fifo_for_clock_1_out_to_sdram_0_s1|full_3               ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.686 ns                 ;
; 0.671 ns                                ; system_0:u0|clock_1:the_clock_1|master_address[20]                                                                                                     ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[37]                                                      ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.015 ns                   ; 0.686 ns                 ;
; 0.674 ns                                ; system_0:u0|clock_0:the_clock_0|master_byteenable[0]                                                                                                   ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[16]                                                      ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.015 ns                   ; 0.689 ns                 ;
; 0.674 ns                                ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_0_out_to_sdram_0_s1_module:rdv_fifo_for_clock_0_out_to_sdram_0_s1|stage_3          ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_0_out_to_sdram_0_s1_module:rdv_fifo_for_clock_0_out_to_sdram_0_s1|stage_2              ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.690 ns                 ;
; 0.674 ns                                ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_1_out_to_sdram_0_s1_module:rdv_fifo_for_clock_1_out_to_sdram_0_s1|full_3           ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_1_out_to_sdram_0_s1_module:rdv_fifo_for_clock_1_out_to_sdram_0_s1|full_2               ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.690 ns                 ;
; 0.676 ns                                ; system_0:u0|clock_0:the_clock_0|master_writedata[9]                                                                                                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[9]                                                       ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.015 ns                   ; 0.691 ns                 ;
; 0.678 ns                                ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[6]                                                   ; system_0:u0|sdram_0:the_sdram_0|active_data[6]                                                                                                             ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.015 ns                   ; 0.693 ns                 ;
; 0.704 ns                                ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[4]                                                   ; system_0:u0|sdram_0:the_sdram_0|active_data[4]                                                                                                             ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.015 ns                   ; 0.719 ns                 ;
; 0.707 ns                                ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[9]                                                   ; system_0:u0|sdram_0:the_sdram_0|active_data[9]                                                                                                             ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.015 ns                   ; 0.722 ns                 ;
; 0.708 ns                                ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_1_out_to_sdram_0_s1_module:rdv_fifo_for_clock_1_out_to_sdram_0_s1|stage_3          ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_1_out_to_sdram_0_s1_module:rdv_fifo_for_clock_1_out_to_sdram_0_s1|stage_2              ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.724 ns                 ;
; 0.710 ns                                ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[10]                                                  ; system_0:u0|sdram_0:the_sdram_0|active_data[10]                                                                                                            ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.015 ns                   ; 0.725 ns                 ;
; 0.710 ns                                ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[39]                                                  ; system_0:u0|sdram_0:the_sdram_0|active_addr[21]                                                                                                            ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.015 ns                   ; 0.725 ns                 ;
; 0.711 ns                                ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[8]                                                   ; system_0:u0|sdram_0:the_sdram_0|active_data[8]                                                                                                             ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.015 ns                   ; 0.726 ns                 ;
; 0.713 ns                                ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[11]                                                  ; system_0:u0|sdram_0:the_sdram_0|active_data[11]                                                                                                            ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.015 ns                   ; 0.728 ns                 ;
; 0.714 ns                                ; system_0:u0|clock_0:the_clock_0|master_writedata[11]                                                                                                   ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[11]                                                      ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.008 ns                   ; 0.722 ns                 ;
; 0.729 ns                                ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_1_out_to_sdram_0_s1_module:rdv_fifo_for_clock_1_out_to_sdram_0_s1|full_5           ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_0_out_to_sdram_0_s1_module:rdv_fifo_for_clock_0_out_to_sdram_0_s1|stage_4              ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.006 ns                   ; 0.735 ns                 ;
; 0.740 ns                                ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_1_out_to_sdram_0_s1_module:rdv_fifo_for_clock_1_out_to_sdram_0_s1|full_1           ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_0_out_to_sdram_0_s1_module:rdv_fifo_for_clock_0_out_to_sdram_0_s1|stage_0              ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.017 ns                   ; 0.757 ns                 ;
; 0.740 ns                                ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_1_out_to_sdram_0_s1_module:rdv_fifo_for_clock_1_out_to_sdram_0_s1|full_1           ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_1_out_to_sdram_0_s1_module:rdv_fifo_for_clock_1_out_to_sdram_0_s1|stage_0              ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.017 ns                   ; 0.757 ns                 ;
; 0.745 ns                                ; system_0:u0|clock_1:the_clock_1|master_writedata[10]                                                                                                   ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[10]                                                      ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.015 ns                   ; 0.760 ns                 ;
; 0.745 ns                                ; system_0:u0|sdram_0:the_sdram_0|i_state.000                                                                                                            ; system_0:u0|sdram_0:the_sdram_0|i_refs[2]                                                                                                                  ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.007 ns                   ; 0.752 ns                 ;
; 0.747 ns                                ; system_0:u0|sdram_0:the_sdram_0|i_state.011                                                                                                            ; system_0:u0|sdram_0:the_sdram_0|i_cmd[2]                                                                                                                   ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.018 ns                   ; 0.765 ns                 ;
; 0.747 ns                                ; system_0:u0|sdram_0:the_sdram_0|m_cmd[2]~_Duplicate_1                                                                                                  ; system_0:u0|sdram_0:the_sdram_0|rd_valid[0]                                                                                                                ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.763 ns                 ;
; 0.747 ns                                ; system_0:u0|sdram_0:the_sdram_0|i_state.000                                                                                                            ; system_0:u0|sdram_0:the_sdram_0|i_refs[0]                                                                                                                  ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.007 ns                   ; 0.754 ns                 ;
; 0.750 ns                                ; system_0:u0|sdram_0:the_sdram_0|init_done                                                                                                              ; system_0:u0|sdram_0:the_sdram_0|ack_refresh_request                                                                                                        ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.017 ns                   ; 0.767 ns                 ;
; 0.751 ns                                ; system_0:u0|sdram_0:the_sdram_0|i_state.011                                                                                                            ; system_0:u0|sdram_0:the_sdram_0|i_next.000                                                                                                                 ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.018 ns                   ; 0.769 ns                 ;
; 0.751 ns                                ; system_0:u0|sdram_0:the_sdram_0|i_state.011                                                                                                            ; system_0:u0|sdram_0:the_sdram_0|i_cmd[0]                                                                                                                   ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.018 ns                   ; 0.769 ns                 ;
; 0.765 ns                                ; system_0:u0|sdram_0:the_sdram_0|i_state.001                                                                                                            ; system_0:u0|sdram_0:the_sdram_0|i_cmd[1]                                                                                                                   ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.781 ns                 ;
; 0.775 ns                                ; system_0:u0|sdram_0:the_sdram_0|i_count[2]                                                                                                             ; system_0:u0|sdram_0:the_sdram_0|i_state.010                                                                                                                ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.791 ns                 ;
; 0.780 ns                                ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_0_out_to_sdram_0_s1_module:rdv_fifo_for_clock_0_out_to_sdram_0_s1|how_many_ones[1] ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_0_out_to_sdram_0_s1_module:rdv_fifo_for_clock_0_out_to_sdram_0_s1|fifo_contains_ones_n ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.796 ns                 ;
; 0.780 ns                                ; system_0:u0|sdram_0:the_sdram_0|i_count[2]                                                                                                             ; system_0:u0|sdram_0:the_sdram_0|i_state.111                                                                                                                ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.796 ns                 ;
; 0.785 ns                                ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_1_out_to_sdram_0_s1_module:rdv_fifo_for_clock_1_out_to_sdram_0_s1|full_6           ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_1_out_to_sdram_0_s1_module:rdv_fifo_for_clock_1_out_to_sdram_0_s1|stage_5              ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.801 ns                 ;
; 0.787 ns                                ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_1_out_to_sdram_0_s1_module:rdv_fifo_for_clock_1_out_to_sdram_0_s1|full_6           ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|rdv_fifo_for_clock_0_out_to_sdram_0_s1_module:rdv_fifo_for_clock_0_out_to_sdram_0_s1|stage_5              ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.803 ns                 ;
; 0.788 ns                                ; I2C_AV_Config:u1|mI2C_CLK_DIV[0]                                                                                                                       ; I2C_AV_Config:u1|mI2C_CLK_DIV[0]                                                                                                                           ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.804 ns                 ;
; 0.788 ns                                ; I2C_AV_Config:u1|I2C_Controller:u0|END                                                                                                                 ; I2C_AV_Config:u1|mSetup_ST.0010                                                                                                                            ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.804 ns                 ;
; 0.790 ns                                ; system_0:u0|sdram_0:the_sdram_0|m_cmd[0]~_Duplicate_1                                                                                                  ; system_0:u0|sdram_0:the_sdram_0|rd_valid[0]                                                                                                                ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.806 ns                 ;
; 0.791 ns                                ; system_0:u0|clock_1:the_clock_1|master_writedata[0]                                                                                                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[0]                                                       ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.807 ns                 ;
; 0.793 ns                                ; system_0:u0|clock_0:the_clock_0|clock_0_edge_to_pulse:read_request_edge_to_pulse|data_in_d1                                                            ; system_0:u0|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_read                                                                                  ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.809 ns                 ;
; 0.794 ns                                ; I2C_AV_Config:u1|I2C_Controller:u0|SD_COUNTER[0]                                                                                                       ; I2C_AV_Config:u1|I2C_Controller:u0|SD_COUNTER[0]                                                                                                           ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.810 ns                 ;
; 0.794 ns                                ; system_0:u0|clock_0:the_clock_0|clock_0_edge_to_pulse:read_request_edge_to_pulse|data_in_d1                                                            ; system_0:u0|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state.010                                                                             ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.810 ns                 ;
; 0.794 ns                                ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|sdram_0_s1_saved_chosen_master_vector[0]                                                              ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|sdram_0_s1_arb_addend[1]                                                                                  ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.810 ns                 ;
; 0.795 ns                                ; system_0:u0|clock_1:the_clock_1|master_address[7]                                                                                                      ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[24]                                                      ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.811 ns                 ;
; 0.795 ns                                ; Reset_Delay:delay1|Cont[12]                                                                                                                            ; Reset_Delay:delay1|Cont[12]                                                                                                                                ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.811 ns                 ;
; 0.795 ns                                ; system_0:u0|clock_0:the_clock_0|clock_0_edge_to_pulse:write_request_edge_to_pulse|data_in_d1                                                           ; system_0:u0|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state.100                                                                             ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.811 ns                 ;
; 0.795 ns                                ; system_0:u0|sdram_0:the_sdram_0|refresh_counter[0]                                                                                                     ; system_0:u0|sdram_0:the_sdram_0|refresh_counter[0]                                                                                                         ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.811 ns                 ;
; 0.795 ns                                ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|sdram_0_s1_saved_chosen_master_vector[0]                                                              ; system_0:u0|sdram_0_s1_arbitrator:the_sdram_0_s1|sdram_0_s1_arb_addend[0]                                                                                  ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.811 ns                 ;
; 0.795 ns                                ; system_0:u0|clock_0:the_clock_0|clock_0_edge_to_pulse:write_request_edge_to_pulse|data_in_d1                                                           ; system_0:u0|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_write                                                                                 ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.811 ns                 ;
; 0.796 ns                                ; system_0:u0|clock_1:the_clock_1|master_address[6]                                                                                                      ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[23]                                                      ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.812 ns                 ;
; 0.796 ns                                ; system_0:u0|clock_1:the_clock_1|master_address[13]                                                                                                     ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_1[30]                                                      ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.812 ns                 ;
; 0.797 ns                                ; system_0:u0|clock_1:the_clock_1|master_address[19]                                                                                                     ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[36]                                                      ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.813 ns                 ;
; 0.798 ns                                ; I2C_AV_Config:u1|mI2C_CLK_DIV[1]                                                                                                                       ; I2C_AV_Config:u1|mI2C_CLK_DIV[1]                                                                                                                           ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.814 ns                 ;
; 0.798 ns                                ; Reset_Delay:delay1|Cont[3]                                                                                                                             ; Reset_Delay:delay1|Cont[3]                                                                                                                                 ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.814 ns                 ;
; 0.798 ns                                ; system_0:u0|clock_1:the_clock_1|master_address[9]                                                                                                      ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[26]                                                      ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.814 ns                 ;
; 0.798 ns                                ; system_0:u0|clock_1:the_clock_1|clock_1_master_FSM:master_FSM|master_state.010                                                                         ; system_0:u0|clock_1:the_clock_1|clock_1_master_FSM:master_FSM|master_read                                                                                  ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.814 ns                 ;
; 0.799 ns                                ; system_0:u0|clock_1:the_clock_1|master_address[4]                                                                                                      ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[21]                                                      ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.815 ns                 ;
; 0.799 ns                                ; system_0:u0|clock_1:the_clock_1|clock_1_edge_to_pulse:write_request_edge_to_pulse|data_in_d1                                                           ; system_0:u0|clock_1:the_clock_1|clock_1_master_FSM:master_FSM|master_state.100                                                                             ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.815 ns                 ;
; 0.800 ns                                ; I2C_AV_Config:u1|mSetup_ST.0000                                                                                                                        ; I2C_AV_Config:u1|mSetup_ST.0001                                                                                                                            ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.816 ns                 ;
; 0.801 ns                                ; system_0:u0|clock_1:the_clock_1|master_address[3]                                                                                                      ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[20]                                                      ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.817 ns                 ;
; 0.802 ns                                ; system_0:u0|clock_1:the_clock_1|master_writedata[2]                                                                                                    ; system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|entry_0[2]                                                       ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.818 ns                 ;
; 0.802 ns                                ; system_0:u0|clock_1:the_clock_1|clock_1_edge_to_pulse:write_request_edge_to_pulse|data_in_d1                                                           ; system_0:u0|clock_1:the_clock_1|clock_1_master_FSM:master_FSM|master_write                                                                                 ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.818 ns                 ;
; 0.804 ns                                ; system_0:u0|sdram_0:the_sdram_0|m_next.010000000                                                                                                       ; system_0:u0|sdram_0:the_sdram_0|m_state.010000000                                                                                                          ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.820 ns                 ;
; 0.805 ns                                ; I2C_AV_Config:u1|LUT_INDEX[0]                                                                                                                          ; I2C_AV_Config:u1|LUT_INDEX[1]                                                                                                                              ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.821 ns                 ;
; 0.805 ns                                ; Reset_Delay:delay1|Cont[5]                                                                                                                             ; Reset_Delay:delay1|Cont[5]                                                                                                                                 ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.821 ns                 ;
; 0.805 ns                                ; Reset_Delay:delay1|Cont[7]                                                                                                                             ; Reset_Delay:delay1|Cont[7]                                                                                                                                 ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.821 ns                 ;
; 0.806 ns                                ; I2C_AV_Config:u1|mI2C_CLK_DIV[2]                                                                                                                       ; I2C_AV_Config:u1|mI2C_CLK_DIV[2]                                                                                                                           ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.822 ns                 ;
; 0.806 ns                                ; I2C_AV_Config:u1|mI2C_CLK_DIV[4]                                                                                                                       ; I2C_AV_Config:u1|mI2C_CLK_DIV[4]                                                                                                                           ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.822 ns                 ;
; 0.806 ns                                ; I2C_AV_Config:u1|mI2C_CLK_DIV[7]                                                                                                                       ; I2C_AV_Config:u1|mI2C_CLK_DIV[7]                                                                                                                           ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.822 ns                 ;
; 0.806 ns                                ; I2C_AV_Config:u1|mI2C_CLK_DIV[9]                                                                                                                       ; I2C_AV_Config:u1|mI2C_CLK_DIV[9]                                                                                                                           ; CLOCK_50   ; CLOCK_50 ; 0.000 ns                   ; 0.016 ns                   ; 0.822 ns                 ;
; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu)                                                                                                    ;                                                                                                                                                            ;            ;          ;                            ;                            ;                          ;
+-----------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------+------------+----------+----------------------------+----------------------------+--------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; tsu                                                                                                                                                                                                                                                                                                                                                                                ;
+-----------------------------------------+-----------------------------------------------------+------------+----------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------+
; Slack                                   ; Required tsu                                        ; Actual tsu ; From                             ; To                                                                                                                                                                                                  ; To Clock                     ;
+-----------------------------------------+-----------------------------------------------------+------------+----------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------+
; N/A                                     ; None                                                ; 8.985 ns   ; SRAM_DQ[5]                       ; system_0:u0|cpu_0:the_cpu_0|d_readdata_d1[21]                                                                                                                                                       ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 8.941 ns   ; SRAM_DQ[0]                       ; system_0:u0|cpu_0:the_cpu_0|d_readdata_d1[16]                                                                                                                                                       ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 8.924 ns   ; SRAM_DQ[7]                       ; system_0:u0|cpu_0:the_cpu_0|d_readdata_d1[23]                                                                                                                                                       ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 8.801 ns   ; SRAM_DQ[3]                       ; system_0:u0|cpu_0:the_cpu_0|d_readdata_d1[19]                                                                                                                                                       ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 8.699 ns   ; SRAM_DQ[8]                       ; system_0:u0|cpu_0:the_cpu_0|d_readdata_d1[24]                                                                                                                                                       ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 8.657 ns   ; SRAM_DQ[6]                       ; system_0:u0|cpu_0:the_cpu_0|d_readdata_d1[22]                                                                                                                                                       ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 8.592 ns   ; SRAM_DQ[15]                      ; system_0:u0|cpu_0:the_cpu_0|d_readdata_d1[31]                                                                                                                                                       ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 8.476 ns   ; SRAM_DQ[7]                       ; system_0:u0|cpu_0:the_cpu_0|i_readdata_d1[23]                                                                                                                                                       ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 8.423 ns   ; SRAM_DQ[13]                      ; system_0:u0|cpu_0:the_cpu_0|d_readdata_d1[29]                                                                                                                                                       ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 8.342 ns   ; SRAM_DQ[4]                       ; system_0:u0|cpu_0:the_cpu_0|d_readdata_d1[20]                                                                                                                                                       ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 8.336 ns   ; SRAM_DQ[6]                       ; system_0:u0|cpu_0:the_cpu_0|i_readdata_d1[22]                                                                                                                                                       ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 8.289 ns   ; SRAM_DQ[8]                       ; system_0:u0|cpu_0:the_cpu_0|i_readdata_d1[24]                                                                                                                                                       ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 8.220 ns   ; SRAM_DQ[1]                       ; system_0:u0|cpu_0:the_cpu_0|d_readdata_d1[17]                                                                                                                                                       ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 8.216 ns   ; SRAM_DQ[0]                       ; system_0:u0|cpu_0:the_cpu_0|i_readdata_d1[16]                                                                                                                                                       ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 8.172 ns   ; SRAM_DQ[2]                       ; system_0:u0|cpu_0:the_cpu_0|d_readdata_d1[18]                                                                                                                                                       ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 8.150 ns   ; SRAM_DQ[12]                      ; system_0:u0|cpu_0:the_cpu_0|d_readdata_d1[28]                                                                                                                                                       ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 8.148 ns   ; SRAM_DQ[11]                      ; system_0:u0|cpu_0:the_cpu_0|d_readdata_d1[27]                                                                                                                                                       ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 8.050 ns   ; SRAM_DQ[2]                       ; system_0:u0|cpu_0:the_cpu_0|i_readdata_d1[18]                                                                                                                                                       ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 8.042 ns   ; SRAM_DQ[9]                       ; system_0:u0|cpu_0:the_cpu_0|d_readdata_d1[25]                                                                                                                                                       ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 7.987 ns   ; SRAM_DQ[15]                      ; system_0:u0|cpu_0:the_cpu_0|i_readdata_d1[31]                                                                                                                                                       ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 7.938 ns   ; KEY[0]                           ; system_0:u0|button_pio:the_button_pio|readdata[0]                                                                                                                                                   ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 7.807 ns   ; SRAM_DQ[10]                      ; system_0:u0|cpu_0:the_cpu_0|d_readdata_d1[26]                                                                                                                                                       ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 7.733 ns   ; KEY[0]                           ; system_0:u0|button_pio:the_button_pio|d1_data_in[0]                                                                                                                                                 ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 7.712 ns   ; SRAM_DQ[4]                       ; system_0:u0|cpu_0:the_cpu_0|i_readdata_d1[20]                                                                                                                                                       ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 7.687 ns   ; SRAM_DQ[3]                       ; system_0:u0|cpu_0:the_cpu_0|i_readdata_d1[19]                                                                                                                                                       ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 7.639 ns   ; SRAM_DQ[9]                       ; system_0:u0|cpu_0:the_cpu_0|i_readdata_d1[25]                                                                                                                                                       ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 7.572 ns   ; SRAM_DQ[1]                       ; system_0:u0|cpu_0:the_cpu_0|i_readdata_d1[17]                                                                                                                                                       ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 7.536 ns   ; SRAM_DQ[10]                      ; system_0:u0|cpu_0:the_cpu_0|i_readdata_d1[26]                                                                                                                                                       ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 7.338 ns   ; SRAM_DQ[0]                       ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|dbs_16_reg_segment_0[0]                                                                                                ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 7.298 ns   ; SRAM_DQ[6]                       ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[6]                                                                                                              ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 7.264 ns   ; SRAM_DQ[9]                       ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|dbs_16_reg_segment_0[9]                                                                                                ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 7.255 ns   ; SRAM_DQ[14]                      ; system_0:u0|cpu_0:the_cpu_0|d_readdata_d1[30]                                                                                                                                                       ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 7.169 ns   ; SRAM_DQ[12]                      ; system_0:u0|cpu_0:the_cpu_0|i_readdata_d1[28]                                                                                                                                                       ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 7.029 ns   ; SRAM_DQ[2]                       ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|dbs_16_reg_segment_0[2]                                                                                                ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 7.020 ns   ; SRAM_DQ[13]                      ; system_0:u0|cpu_0:the_cpu_0|i_readdata_d1[29]                                                                                                                                                       ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 7.010 ns   ; SRAM_DQ[8]                       ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|dbs_16_reg_segment_0[8]                                                                                                ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 6.996 ns   ; KEY[1]                           ; system_0:u0|button_pio:the_button_pio|d1_data_in[1]                                                                                                                                                 ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 6.995 ns   ; SRAM_DQ[1]                       ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|dbs_16_reg_segment_0[1]                                                                                                ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 6.993 ns   ; KEY[1]                           ; system_0:u0|button_pio:the_button_pio|readdata[1]                                                                                                                                                   ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 6.984 ns   ; SRAM_DQ[11]                      ; system_0:u0|cpu_0:the_cpu_0|i_readdata_d1[27]                                                                                                                                                       ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 6.955 ns   ; SRAM_DQ[5]                       ; system_0:u0|cpu_0:the_cpu_0|i_readdata_d1[21]                                                                                                                                                       ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 6.933 ns   ; KEY[2]                           ; system_0:u0|button_pio:the_button_pio|readdata[2]                                                                                                                                                   ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 6.892 ns   ; SRAM_DQ[4]                       ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[4]                                                                                                              ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 6.838 ns   ; SRAM_DQ[3]                       ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[3]                                                                                                              ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 6.835 ns   ; SRAM_DQ[15]                      ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|dbs_16_reg_segment_0[15]                                                                                               ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 6.811 ns   ; SRAM_DQ[6]                       ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|dbs_16_reg_segment_0[6]                                                                                                ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 6.774 ns   ; SRAM_DQ[5]                       ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[5]                                                                                                              ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 6.761 ns   ; SRAM_DQ[3]                       ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|dbs_16_reg_segment_0[3]                                                                                                ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 6.760 ns   ; SRAM_DQ[7]                       ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[7]                                                                                                              ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 6.726 ns   ; SRAM_DQ[5]                       ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|dbs_16_reg_segment_0[5]                                                                                                ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 6.708 ns   ; SRAM_DQ[0]                       ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[0]                                                                                                              ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 6.695 ns   ; SRAM_DQ[8]                       ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[8]                                                                                                              ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 6.679 ns   ; SRAM_DQ[4]                       ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|dbs_16_reg_segment_0[4]                                                                                                ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 6.672 ns   ; SRAM_DQ[2]                       ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[2]                                                                                                              ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 6.658 ns   ; KEY[2]                           ; system_0:u0|button_pio:the_button_pio|d1_data_in[2]                                                                                                                                                 ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 6.649 ns   ; SRAM_DQ[9]                       ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[9]                                                                                                              ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 6.608 ns   ; SRAM_DQ[10]                      ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[10]                                                                                                             ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 6.583 ns   ; SRAM_DQ[14]                      ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|dbs_16_reg_segment_0[14]                                                                                               ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 6.566 ns   ; SRAM_DQ[12]                      ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|dbs_16_reg_segment_0[12]                                                                                               ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 6.561 ns   ; SRAM_DQ[14]                      ; system_0:u0|cpu_0:the_cpu_0|i_readdata_d1[30]                                                                                                                                                       ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 6.558 ns   ; SRAM_DQ[1]                       ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[1]                                                                                                              ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 6.558 ns   ; SRAM_DQ[13]                      ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[13]                                                                                                             ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 6.523 ns   ; SRAM_DQ[10]                      ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|dbs_16_reg_segment_0[10]                                                                                               ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 6.501 ns   ; SRAM_DQ[11]                      ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[11]                                                                                                             ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 6.499 ns   ; SRAM_DQ[15]                      ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[15]                                                                                                             ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 6.458 ns   ; SRAM_DQ[13]                      ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|dbs_16_reg_segment_0[13]                                                                                               ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 6.376 ns   ; KEY[3]                           ; system_0:u0|button_pio:the_button_pio|readdata[3]                                                                                                                                                   ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 6.375 ns   ; KEY[3]                           ; system_0:u0|button_pio:the_button_pio|d1_data_in[3]                                                                                                                                                 ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 6.323 ns   ; SRAM_DQ[12]                      ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[12]                                                                                                             ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 6.243 ns   ; SRAM_DQ[7]                       ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|dbs_16_reg_segment_0[7]                                                                                                ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 6.088 ns   ; SRAM_DQ[14]                      ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[14]                                                                                                             ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 6.088 ns   ; SRAM_DQ[11]                      ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|dbs_16_reg_segment_0[11]                                                                                               ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 5.917 ns   ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[11]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 5.718 ns   ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[10]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 5.691 ns   ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|dr_update1 ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 5.681 ns   ; FL_DQ[2]                         ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|incoming_tri_state_bridge_0_data[2]                                                                      ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 5.681 ns   ; FL_DQ[3]                         ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|incoming_tri_state_bridge_0_data[3]                                                                      ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 5.679 ns   ; FL_DQ[7]                         ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|incoming_tri_state_bridge_0_data[7]                                                                      ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 5.679 ns   ; FL_DQ[6]                         ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|incoming_tri_state_bridge_0_data[6]                                                                      ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 5.679 ns   ; FL_DQ[5]                         ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|incoming_tri_state_bridge_0_data[5]                                                                      ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 5.679 ns   ; FL_DQ[4]                         ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|incoming_tri_state_bridge_0_data[4]                                                                      ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 5.661 ns   ; FL_DQ[1]                         ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|incoming_tri_state_bridge_0_data[1]                                                                      ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 5.661 ns   ; FL_DQ[0]                         ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|incoming_tri_state_bridge_0_data[0]                                                                      ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 5.597 ns   ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[9]      ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 5.450 ns   ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[28]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 5.418 ns   ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[25]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 5.418 ns   ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[26]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 5.349 ns   ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[13]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 5.214 ns   ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[14]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 5.212 ns   ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[12]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 5.124 ns   ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[29]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 5.118 ns   ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[27]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 5.001 ns   ; KEY[0]                           ; I2C_AV_Config:u1|altsyncram:Ram0_rtl_0|altsyncram_mj01:auto_generated|ram_block1a0~porta_address_reg0                                                                                               ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 5.001 ns   ; KEY[0]                           ; I2C_AV_Config:u1|altsyncram:Ram0_rtl_0|altsyncram_mj01:auto_generated|ram_block1a0~porta_address_reg1                                                                                               ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 5.001 ns   ; KEY[0]                           ; I2C_AV_Config:u1|altsyncram:Ram0_rtl_0|altsyncram_mj01:auto_generated|ram_block1a0~porta_address_reg2                                                                                               ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 5.001 ns   ; KEY[0]                           ; I2C_AV_Config:u1|altsyncram:Ram0_rtl_0|altsyncram_mj01:auto_generated|ram_block1a0~porta_address_reg3                                                                                               ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 5.001 ns   ; KEY[0]                           ; I2C_AV_Config:u1|altsyncram:Ram0_rtl_0|altsyncram_mj01:auto_generated|ram_block1a0~porta_address_reg4                                                                                               ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 5.001 ns   ; KEY[0]                           ; I2C_AV_Config:u1|altsyncram:Ram0_rtl_0|altsyncram_mj01:auto_generated|ram_block1a0~porta_address_reg5                                                                                               ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 4.804 ns   ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[17]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 4.799 ns   ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[18]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 4.794 ns   ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[16]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 4.756 ns   ; KEY[0]                           ; I2C_AV_Config:u1|mI2C_DATA[22]                                                                                                                                                                      ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 4.726 ns   ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[19]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 4.724 ns   ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[22]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 4.723 ns   ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[33]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 4.691 ns   ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[20]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 4.681 ns   ; altera_internal_jtag~RUNIDLEUSER ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_nios2_oci_debug:the_cpu_0_nios2_oci_debug|monitor_go                                                                          ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 4.580 ns   ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[24]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 4.550 ns   ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[21]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 4.547 ns   ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[23]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 4.514 ns   ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[30]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 4.514 ns   ; KEY[0]                           ; I2C_AV_Config:u1|I2C_Controller:u0|SD[15]                                                                                                                                                           ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 4.514 ns   ; KEY[0]                           ; I2C_AV_Config:u1|I2C_Controller:u0|SD[14]                                                                                                                                                           ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 4.514 ns   ; KEY[0]                           ; I2C_AV_Config:u1|I2C_Controller:u0|SD[13]                                                                                                                                                           ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 4.514 ns   ; KEY[0]                           ; I2C_AV_Config:u1|I2C_Controller:u0|SD[12]                                                                                                                                                           ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 4.514 ns   ; KEY[0]                           ; I2C_AV_Config:u1|I2C_Controller:u0|SD[11]                                                                                                                                                           ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 4.514 ns   ; KEY[0]                           ; I2C_AV_Config:u1|I2C_Controller:u0|SD[10]                                                                                                                                                           ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 4.514 ns   ; KEY[0]                           ; I2C_AV_Config:u1|I2C_Controller:u0|SD[9]                                                                                                                                                            ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 4.514 ns   ; KEY[0]                           ; I2C_AV_Config:u1|I2C_Controller:u0|SD[8]                                                                                                                                                            ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 4.514 ns   ; KEY[0]                           ; I2C_AV_Config:u1|I2C_Controller:u0|SD[7]                                                                                                                                                            ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 4.514 ns   ; KEY[0]                           ; I2C_AV_Config:u1|I2C_Controller:u0|SD[6]                                                                                                                                                            ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 4.514 ns   ; KEY[0]                           ; I2C_AV_Config:u1|I2C_Controller:u0|SD[5]                                                                                                                                                            ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 4.514 ns   ; KEY[0]                           ; I2C_AV_Config:u1|I2C_Controller:u0|SD[4]                                                                                                                                                            ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 4.514 ns   ; KEY[0]                           ; I2C_AV_Config:u1|I2C_Controller:u0|SD[3]                                                                                                                                                            ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 4.514 ns   ; KEY[0]                           ; I2C_AV_Config:u1|I2C_Controller:u0|SD[2]                                                                                                                                                            ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 4.514 ns   ; KEY[0]                           ; I2C_AV_Config:u1|I2C_Controller:u0|SD[1]                                                                                                                                                            ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 4.514 ns   ; KEY[0]                           ; I2C_AV_Config:u1|I2C_Controller:u0|SD[0]                                                                                                                                                            ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 4.403 ns   ; KEY[0]                           ; I2C_AV_Config:u1|I2C_Controller:u0|SD[22]                                                                                                                                                           ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 4.391 ns   ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[36]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 4.391 ns   ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[37]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 4.338 ns   ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[32]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.771 ns   ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[3]      ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.771 ns   ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[4]      ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.771 ns   ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[2]      ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.771 ns   ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[1]      ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.687 ns   ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[36]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.687 ns   ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[37]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.564 ns   ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[11]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.564 ns   ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[10]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.564 ns   ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[5]      ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.564 ns   ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[6]      ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.564 ns   ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[7]      ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.564 ns   ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[8]      ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.564 ns   ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[9]      ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.549 ns   ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|ir[0]      ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.549 ns   ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|ir[1]      ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.538 ns   ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[17]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.538 ns   ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[16]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.538 ns   ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[18]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.319 ns   ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[22]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.319 ns   ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[23]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.319 ns   ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[24]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.319 ns   ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[21]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.319 ns   ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[19]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.319 ns   ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[20]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.302 ns   ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[34]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.289 ns   ; DRAM_DQ[2]                       ; system_0:u0|sdram_0:the_sdram_0|za_data[2]                                                                                                                                                          ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 3.289 ns   ; DRAM_DQ[1]                       ; system_0:u0|sdram_0:the_sdram_0|za_data[1]                                                                                                                                                          ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 3.287 ns   ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[35]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.287 ns   ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[31]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.285 ns   ; DRAM_DQ[9]                       ; system_0:u0|sdram_0:the_sdram_0|za_data[9]                                                                                                                                                          ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 3.285 ns   ; DRAM_DQ[7]                       ; system_0:u0|sdram_0:the_sdram_0|za_data[7]                                                                                                                                                          ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 3.285 ns   ; DRAM_DQ[10]                      ; system_0:u0|sdram_0:the_sdram_0|za_data[10]                                                                                                                                                         ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 3.280 ns   ; DRAM_DQ[14]                      ; system_0:u0|sdram_0:the_sdram_0|za_data[14]                                                                                                                                                         ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 3.280 ns   ; DRAM_DQ[13]                      ; system_0:u0|sdram_0:the_sdram_0|za_data[13]                                                                                                                                                         ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 3.270 ns   ; DRAM_DQ[12]                      ; system_0:u0|sdram_0:the_sdram_0|za_data[12]                                                                                                                                                         ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 3.270 ns   ; DRAM_DQ[11]                      ; system_0:u0|sdram_0:the_sdram_0|za_data[11]                                                                                                                                                         ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 3.262 ns   ; DRAM_DQ[3]                       ; system_0:u0|sdram_0:the_sdram_0|za_data[3]                                                                                                                                                          ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 3.262 ns   ; DRAM_DQ[6]                       ; system_0:u0|sdram_0:the_sdram_0|za_data[6]                                                                                                                                                          ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 3.262 ns   ; DRAM_DQ[4]                       ; system_0:u0|sdram_0:the_sdram_0|za_data[4]                                                                                                                                                          ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 3.262 ns   ; DRAM_DQ[5]                       ; system_0:u0|sdram_0:the_sdram_0|za_data[5]                                                                                                                                                          ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 3.259 ns   ; DRAM_DQ[0]                       ; system_0:u0|sdram_0:the_sdram_0|za_data[0]                                                                                                                                                          ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 3.255 ns   ; DRAM_DQ[8]                       ; system_0:u0|sdram_0:the_sdram_0|za_data[8]                                                                                                                                                          ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 3.246 ns   ; DRAM_DQ[15]                      ; system_0:u0|sdram_0:the_sdram_0|za_data[15]                                                                                                                                                         ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 3.227 ns   ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[25]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.227 ns   ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[26]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.227 ns   ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[27]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.227 ns   ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[28]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.227 ns   ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[29]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.227 ns   ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[30]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.208 ns   ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[34]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.208 ns   ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[32]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.208 ns   ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[33]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.195 ns   ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[12]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.195 ns   ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[13]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.195 ns   ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[14]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.195 ns   ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[15]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.195 ns   ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[0]      ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.190 ns   ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[35]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.190 ns   ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[31]     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.124 ns   ; I2C_SDAT                         ; I2C_AV_Config:u1|I2C_Controller:u0|ACK1                                                                                                                                                             ; CLOCK_50                     ;
; N/A                                     ; None                                                ; 3.067 ns   ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[3]      ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.067 ns   ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[4]      ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.067 ns   ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[2]      ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 3.067 ns   ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[1]      ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 2.860 ns   ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[5]      ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 2.860 ns   ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[6]      ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 2.860 ns   ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[7]      ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 2.860 ns   ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[8]      ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 2.817 ns   ; I2C_SDAT                         ; I2C_AV_Config:u1|I2C_Controller:u0|ACK2                                                                                                                                                             ; CLOCK_50                     ;
; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ;            ;                                  ;                                                                                                                                                                                                     ;                              ;
+-----------------------------------------+-----------------------------------------------------+------------+----------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; tco                                                                                                                                                                                                                                                                ;
+-----------------------------------------+-----------------------------------------------------+------------+--------------------------------------------------------------------------------------------------------------------------+---------------+------------+
; Slack                                   ; Required tco                                        ; Actual tco ; From                                                                                                                     ; To            ; From Clock ;
+-----------------------------------------+-----------------------------------------------------+------------+--------------------------------------------------------------------------------------------------------------------------+---------------+------------+
; N/A                                     ; None                                                ; 15.302 ns  ; I2C_AV_Config:u1|I2C_Controller:u0|SD_COUNTER[1]                                                                         ; I2C_SCLK      ; CLOCK_50   ;
; N/A                                     ; None                                                ; 14.802 ns  ; I2C_AV_Config:u1|I2C_Controller:u0|SD_COUNTER[0]                                                                         ; I2C_SCLK      ; CLOCK_50   ;
; N/A                                     ; None                                                ; 14.763 ns  ; I2C_AV_Config:u1|I2C_Controller:u0|SD_COUNTER[3]                                                                         ; I2C_SCLK      ; CLOCK_50   ;
; N/A                                     ; None                                                ; 14.664 ns  ; I2C_AV_Config:u1|I2C_Controller:u0|SD_COUNTER[2]                                                                         ; I2C_SCLK      ; CLOCK_50   ;
; N/A                                     ; None                                                ; 13.374 ns  ; I2C_AV_Config:u1|I2C_Controller:u0|SD_COUNTER[4]                                                                         ; I2C_SCLK      ; CLOCK_50   ;
; N/A                                     ; None                                                ; 13.281 ns  ; system_0:u0|cpu_0:the_cpu_0|d_read                                                                                       ; SRAM_WE_N     ; CLOCK_50   ;
; N/A                                     ; None                                                ; 13.031 ns  ; system_0:u0|cpu_0:the_cpu_0|d_read                                                                                       ; SRAM_DQ[10]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 13.031 ns  ; system_0:u0|cpu_0:the_cpu_0|d_read                                                                                       ; SRAM_DQ[11]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 13.021 ns  ; system_0:u0|cpu_0:the_cpu_0|d_read                                                                                       ; SRAM_DQ[12]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 13.021 ns  ; system_0:u0|cpu_0:the_cpu_0|d_read                                                                                       ; SRAM_DQ[13]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 13.018 ns  ; system_0:u0|cpu_0:the_cpu_0|d_read                                                                                       ; SRAM_DQ[14]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 13.018 ns  ; system_0:u0|cpu_0:the_cpu_0|d_read                                                                                       ; SRAM_DQ[15]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 12.928 ns  ; I2C_AV_Config:u1|I2C_Controller:u0|SD_COUNTER[5]                                                                         ; I2C_SCLK      ; CLOCK_50   ;
; N/A                                     ; None                                                ; 12.817 ns  ; system_0:u0|cpu_0:the_cpu_0|d_read                                                                                       ; SRAM_DQ[5]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 12.817 ns  ; system_0:u0|cpu_0:the_cpu_0|d_read                                                                                       ; SRAM_DQ[6]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 12.807 ns  ; system_0:u0|cpu_0:the_cpu_0|d_read                                                                                       ; SRAM_DQ[7]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 12.790 ns  ; system_0:u0|cpu_0:the_cpu_0|d_read                                                                                       ; SRAM_DQ[9]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 12.790 ns  ; system_0:u0|cpu_0:the_cpu_0|d_read                                                                                       ; SRAM_DQ[8]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 12.627 ns  ; system_0:u0|cpu_0:the_cpu_0|d_read                                                                                       ; SRAM_LB_N     ; CLOCK_50   ;
; N/A                                     ; None                                                ; 12.575 ns  ; system_0:u0|cpu_0:the_cpu_0|d_read                                                                                       ; SRAM_ADDR[1]  ; CLOCK_50   ;
; N/A                                     ; None                                                ; 12.554 ns  ; system_0:u0|cpu_0:the_cpu_0|d_read                                                                                       ; SRAM_ADDR[3]  ; CLOCK_50   ;
; N/A                                     ; None                                                ; 12.532 ns  ; system_0:u0|cpu_0:the_cpu_0|d_read                                                                                       ; SRAM_DQ[2]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 12.512 ns  ; system_0:u0|cpu_0:the_cpu_0|d_read                                                                                       ; SRAM_DQ[3]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 12.506 ns  ; system_0:u0|cpu_0:the_cpu_0|d_read                                                                                       ; SRAM_DQ[4]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 12.501 ns  ; system_0:u0|cpu_0:the_cpu_0|d_read                                                                                       ; SRAM_ADDR[4]  ; CLOCK_50   ;
; N/A                                     ; None                                                ; 12.493 ns  ; system_0:u0|cpu_0:the_cpu_0|d_read                                                                                       ; SRAM_ADDR[5]  ; CLOCK_50   ;
; N/A                                     ; None                                                ; 12.469 ns  ; system_0:u0|cpu_0:the_cpu_0|d_read                                                                                       ; SRAM_ADDR[11] ; CLOCK_50   ;
; N/A                                     ; None                                                ; 12.421 ns  ; I2C_AV_Config:u1|mI2C_CTRL_CLK                                                                                           ; I2C_SCLK      ; CLOCK_50   ;
; N/A                                     ; None                                                ; 12.335 ns  ; system_0:u0|cpu_0:the_cpu_0|d_read                                                                                       ; SRAM_ADDR[14] ; CLOCK_50   ;
; N/A                                     ; None                                                ; 12.331 ns  ; system_0:u0|cpu_0:the_cpu_0|d_read                                                                                       ; SRAM_OE_N     ; CLOCK_50   ;
; N/A                                     ; None                                                ; 12.293 ns  ; system_0:u0|cpu_0:the_cpu_0|d_read                                                                                       ; SRAM_ADDR[2]  ; CLOCK_50   ;
; N/A                                     ; None                                                ; 12.283 ns  ; system_0:u0|cpu_0:the_cpu_0|d_read                                                                                       ; SRAM_ADDR[9]  ; CLOCK_50   ;
; N/A                                     ; None                                                ; 12.282 ns  ; system_0:u0|cpu_0:the_cpu_0|d_read                                                                                       ; SRAM_ADDR[6]  ; CLOCK_50   ;
; N/A                                     ; None                                                ; 12.271 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[23]                                                                                ; SRAM_WE_N     ; CLOCK_50   ;
; N/A                                     ; None                                                ; 12.271 ns  ; system_0:u0|cpu_0:the_cpu_0|d_read                                                                                       ; SRAM_ADDR[16] ; CLOCK_50   ;
; N/A                                     ; None                                                ; 12.271 ns  ; system_0:u0|cpu_0:the_cpu_0|d_read                                                                                       ; SRAM_ADDR[7]  ; CLOCK_50   ;
; N/A                                     ; None                                                ; 12.262 ns  ; I2C_AV_Config:u1|I2C_Controller:u0|SCLK                                                                                  ; I2C_SCLK      ; CLOCK_50   ;
; N/A                                     ; None                                                ; 12.257 ns  ; system_0:u0|cpu_0:the_cpu_0|d_read                                                                                       ; SRAM_ADDR[10] ; CLOCK_50   ;
; N/A                                     ; None                                                ; 12.237 ns  ; system_0:u0|cpu_0:the_cpu_0|d_read                                                                                       ; SRAM_ADDR[8]  ; CLOCK_50   ;
; N/A                                     ; None                                                ; 12.127 ns  ; system_0:u0|cpu_0:the_cpu_0|d_read                                                                                       ; SRAM_ADDR[12] ; CLOCK_50   ;
; N/A                                     ; None                                                ; 12.064 ns  ; system_0:u0|cpu_0:the_cpu_0|d_read                                                                                       ; SRAM_ADDR[0]  ; CLOCK_50   ;
; N/A                                     ; None                                                ; 12.038 ns  ; system_0:u0|cpu_0:the_cpu_0|d_read                                                                                       ; SRAM_DQ[1]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 12.028 ns  ; system_0:u0|cpu_0:the_cpu_0|d_read                                                                                       ; SRAM_DQ[0]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 12.023 ns  ; system_0:u0|cpu_0:the_cpu_0|d_read                                                                                       ; SRAM_ADDR[15] ; CLOCK_50   ;
; N/A                                     ; None                                                ; 12.022 ns  ; system_0:u0|cpu_0:the_cpu_0|d_read                                                                                       ; SRAM_ADDR[17] ; CLOCK_50   ;
; N/A                                     ; None                                                ; 12.021 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[23]                                                                                ; SRAM_DQ[10]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 12.021 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[23]                                                                                ; SRAM_DQ[11]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 12.011 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[23]                                                                                ; SRAM_DQ[12]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 12.011 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[23]                                                                                ; SRAM_DQ[13]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 12.008 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[23]                                                                                ; SRAM_DQ[14]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 12.008 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[23]                                                                                ; SRAM_DQ[15]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 12.005 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[22]                                                                                ; SRAM_WE_N     ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.980 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[21]                                                                                ; SRAM_WE_N     ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.911 ns  ; system_0:u0|cpu_0:the_cpu_0|i_read                                                                                       ; SRAM_WE_N     ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.899 ns  ; system_0:u0|cpu_0:the_cpu_0|d_read                                                                                       ; SRAM_ADDR[13] ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.841 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[20]                                                                                ; SRAM_WE_N     ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.807 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[23]                                                                                ; SRAM_DQ[5]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.807 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[23]                                                                                ; SRAM_DQ[6]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.797 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[23]                                                                                ; SRAM_DQ[7]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.780 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[23]                                                                                ; SRAM_DQ[9]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.780 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[23]                                                                                ; SRAM_DQ[8]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.755 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[22]                                                                                ; SRAM_DQ[10]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.755 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[22]                                                                                ; SRAM_DQ[11]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.745 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[22]                                                                                ; SRAM_DQ[12]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.745 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[22]                                                                                ; SRAM_DQ[13]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.742 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[22]                                                                                ; SRAM_DQ[14]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.742 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[22]                                                                                ; SRAM_DQ[15]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.730 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[21]                                                                                ; SRAM_DQ[10]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.730 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[21]                                                                                ; SRAM_DQ[11]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.720 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[21]                                                                                ; SRAM_DQ[12]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.720 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[21]                                                                                ; SRAM_DQ[13]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.717 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[21]                                                                                ; SRAM_DQ[14]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.717 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[21]                                                                                ; SRAM_DQ[15]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.693 ns  ; I2C_AV_Config:u1|I2C_Controller:u0|SDO                                                                                   ; I2C_SDAT      ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.661 ns  ; system_0:u0|cpu_0:the_cpu_0|i_read                                                                                       ; SRAM_DQ[10]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.661 ns  ; system_0:u0|cpu_0:the_cpu_0|i_read                                                                                       ; SRAM_DQ[11]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.651 ns  ; system_0:u0|cpu_0:the_cpu_0|i_read                                                                                       ; SRAM_DQ[12]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.651 ns  ; system_0:u0|cpu_0:the_cpu_0|i_read                                                                                       ; SRAM_DQ[13]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.648 ns  ; system_0:u0|cpu_0:the_cpu_0|i_read                                                                                       ; SRAM_DQ[14]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.648 ns  ; system_0:u0|cpu_0:the_cpu_0|i_read                                                                                       ; SRAM_DQ[15]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.617 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[23]                                                                                ; SRAM_LB_N     ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.591 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[20]                                                                                ; SRAM_DQ[10]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.591 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[20]                                                                                ; SRAM_DQ[11]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.581 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[20]                                                                                ; SRAM_DQ[12]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.581 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[20]                                                                                ; SRAM_DQ[13]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.581 ns  ; system_0:u0|cpu_0:the_cpu_0|d_read                                                                                       ; SRAM_UB_N     ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.578 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[20]                                                                                ; SRAM_DQ[14]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.578 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[20]                                                                                ; SRAM_DQ[15]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.565 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[23]                                                                                ; SRAM_ADDR[1]  ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.544 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[23]                                                                                ; SRAM_ADDR[3]  ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.541 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[22]                                                                                ; SRAM_DQ[5]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.541 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[22]                                                                                ; SRAM_DQ[6]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.531 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[22]                                                                                ; SRAM_DQ[7]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.530 ns  ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|cpu_0_instruction_master_latency_counter[0] ; SRAM_WE_N     ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.522 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[23]                                                                                ; SRAM_DQ[2]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.516 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[21]                                                                                ; SRAM_DQ[5]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.516 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[21]                                                                                ; SRAM_DQ[6]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.514 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[22]                                                                                ; SRAM_DQ[9]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.514 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[22]                                                                                ; SRAM_DQ[8]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.506 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[21]                                                                                ; SRAM_DQ[7]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.502 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[23]                                                                                ; SRAM_DQ[3]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.496 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[23]                                                                                ; SRAM_DQ[4]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.491 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[23]                                                                                ; SRAM_ADDR[4]  ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.489 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[21]                                                                                ; SRAM_DQ[9]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.489 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[21]                                                                                ; SRAM_DQ[8]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.483 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[23]                                                                                ; SRAM_ADDR[5]  ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.475 ns  ; system_0:u0|cpu_0:the_cpu_0|d_write                                                                                      ; SRAM_WE_N     ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.459 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[23]                                                                                ; SRAM_ADDR[11] ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.447 ns  ; system_0:u0|cpu_0:the_cpu_0|i_read                                                                                       ; SRAM_DQ[5]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.447 ns  ; system_0:u0|cpu_0:the_cpu_0|i_read                                                                                       ; SRAM_DQ[6]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.437 ns  ; system_0:u0|cpu_0:the_cpu_0|i_read                                                                                       ; SRAM_DQ[7]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.420 ns  ; system_0:u0|cpu_0:the_cpu_0|i_read                                                                                       ; SRAM_DQ[9]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.420 ns  ; system_0:u0|cpu_0:the_cpu_0|i_read                                                                                       ; SRAM_DQ[8]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.377 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[20]                                                                                ; SRAM_DQ[5]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.377 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[20]                                                                                ; SRAM_DQ[6]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.367 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[20]                                                                                ; SRAM_DQ[7]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.351 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[22]                                                                                ; SRAM_LB_N     ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.350 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[20]                                                                                ; SRAM_DQ[9]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.350 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[20]                                                                                ; SRAM_DQ[8]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.326 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[21]                                                                                ; SRAM_LB_N     ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.325 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[23]                                                                                ; SRAM_ADDR[14] ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.321 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[23]                                                                                ; SRAM_OE_N     ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.299 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[22]                                                                                ; SRAM_ADDR[1]  ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.290 ns  ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|cpu_0_data_master_dbs_address[1]                          ; SRAM_WE_N     ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.283 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[23]                                                                                ; SRAM_ADDR[2]  ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.280 ns  ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|cpu_0_instruction_master_latency_counter[0] ; SRAM_DQ[10]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.280 ns  ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|cpu_0_instruction_master_latency_counter[0] ; SRAM_DQ[11]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.280 ns  ; system_0:u0|cpu_0:the_cpu_0|ic_fill_tag[11]                                                                              ; SRAM_WE_N     ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.279 ns  ; system_0:u0|cpu_0:the_cpu_0|ic_fill_tag[8]                                                                               ; SRAM_WE_N     ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.278 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[22]                                                                                ; SRAM_ADDR[3]  ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.274 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[21]                                                                                ; SRAM_ADDR[1]  ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.273 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[23]                                                                                ; SRAM_ADDR[9]  ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.272 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[23]                                                                                ; SRAM_ADDR[6]  ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.270 ns  ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|cpu_0_instruction_master_latency_counter[0] ; SRAM_DQ[12]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.270 ns  ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|cpu_0_instruction_master_latency_counter[0] ; SRAM_DQ[13]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.267 ns  ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|cpu_0_instruction_master_latency_counter[0] ; SRAM_DQ[14]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.267 ns  ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|cpu_0_instruction_master_latency_counter[0] ; SRAM_DQ[15]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.261 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[23]                                                                                ; SRAM_ADDR[16] ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.261 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[23]                                                                                ; SRAM_ADDR[7]  ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.257 ns  ; system_0:u0|cpu_0:the_cpu_0|i_read                                                                                       ; SRAM_LB_N     ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.256 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[22]                                                                                ; SRAM_DQ[2]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.253 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[21]                                                                                ; SRAM_ADDR[3]  ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.247 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[23]                                                                                ; SRAM_ADDR[10] ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.243 ns  ; system_0:u0|cpu_0:the_cpu_0|ic_fill_tag[9]                                                                               ; SRAM_WE_N     ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.236 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[22]                                                                                ; SRAM_DQ[3]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.231 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[21]                                                                                ; SRAM_DQ[2]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.230 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[22]                                                                                ; SRAM_DQ[4]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.227 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[23]                                                                                ; SRAM_ADDR[8]  ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.225 ns  ; system_0:u0|cpu_0:the_cpu_0|d_write                                                                                      ; SRAM_DQ[10]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.225 ns  ; system_0:u0|cpu_0:the_cpu_0|d_write                                                                                      ; SRAM_DQ[11]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.225 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[22]                                                                                ; SRAM_ADDR[4]  ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.217 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[22]                                                                                ; SRAM_ADDR[5]  ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.215 ns  ; system_0:u0|cpu_0:the_cpu_0|d_write                                                                                      ; SRAM_DQ[12]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.215 ns  ; system_0:u0|cpu_0:the_cpu_0|d_write                                                                                      ; SRAM_DQ[13]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.215 ns  ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|cpu_0_instruction_master_latency_counter[1] ; SRAM_WE_N     ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.212 ns  ; system_0:u0|cpu_0:the_cpu_0|d_write                                                                                      ; SRAM_DQ[14]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.212 ns  ; system_0:u0|cpu_0:the_cpu_0|d_write                                                                                      ; SRAM_DQ[15]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.211 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[21]                                                                                ; SRAM_DQ[3]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.205 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[21]                                                                                ; SRAM_DQ[4]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.205 ns  ; system_0:u0|cpu_0:the_cpu_0|i_read                                                                                       ; SRAM_ADDR[1]  ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.200 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[21]                                                                                ; SRAM_ADDR[4]  ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.193 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[22]                                                                                ; SRAM_ADDR[11] ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.192 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[21]                                                                                ; SRAM_ADDR[5]  ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.187 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[20]                                                                                ; SRAM_LB_N     ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.184 ns  ; system_0:u0|cpu_0:the_cpu_0|i_read                                                                                       ; SRAM_ADDR[3]  ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.168 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[21]                                                                                ; SRAM_ADDR[11] ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.162 ns  ; system_0:u0|cpu_0:the_cpu_0|i_read                                                                                       ; SRAM_DQ[2]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.150 ns  ; system_0:u0|cpu_0:the_cpu_0|d_byteenable[3]                                                                              ; SRAM_WE_N     ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.142 ns  ; system_0:u0|cpu_0:the_cpu_0|i_read                                                                                       ; SRAM_DQ[3]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.136 ns  ; system_0:u0|cpu_0:the_cpu_0|i_read                                                                                       ; SRAM_DQ[4]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.135 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[20]                                                                                ; SRAM_ADDR[1]  ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.131 ns  ; system_0:u0|cpu_0:the_cpu_0|i_read                                                                                       ; SRAM_ADDR[4]  ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.123 ns  ; system_0:u0|cpu_0:the_cpu_0|i_read                                                                                       ; SRAM_ADDR[5]  ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.117 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[23]                                                                                ; SRAM_ADDR[12] ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.114 ns  ; system_0:u0|cpu_0:the_cpu_0|d_byteenable[0]                                                                              ; SRAM_WE_N     ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.114 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[20]                                                                                ; SRAM_ADDR[3]  ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.099 ns  ; system_0:u0|cpu_0:the_cpu_0|i_read                                                                                       ; SRAM_ADDR[11] ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.092 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[20]                                                                                ; SRAM_DQ[2]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.072 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[20]                                                                                ; SRAM_DQ[3]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.066 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[20]                                                                                ; SRAM_DQ[4]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.066 ns  ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|cpu_0_instruction_master_latency_counter[0] ; SRAM_DQ[5]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.066 ns  ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|cpu_0_instruction_master_latency_counter[0] ; SRAM_DQ[6]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.061 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[20]                                                                                ; SRAM_ADDR[4]  ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.059 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[22]                                                                                ; SRAM_ADDR[14] ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.056 ns  ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|cpu_0_instruction_master_latency_counter[0] ; SRAM_DQ[7]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.055 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[22]                                                                                ; SRAM_OE_N     ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.054 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[23]                                                                                ; SRAM_ADDR[0]  ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.053 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[20]                                                                                ; SRAM_ADDR[5]  ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.040 ns  ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|cpu_0_data_master_dbs_address[1]                          ; SRAM_DQ[10]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.040 ns  ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|cpu_0_data_master_dbs_address[1]                          ; SRAM_DQ[11]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.039 ns  ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|cpu_0_instruction_master_latency_counter[0] ; SRAM_DQ[9]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.039 ns  ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|cpu_0_instruction_master_latency_counter[0] ; SRAM_DQ[8]    ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.034 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[21]                                                                                ; SRAM_ADDR[14] ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.030 ns  ; system_0:u0|cpu_0:the_cpu_0|ic_fill_tag[11]                                                                              ; SRAM_DQ[10]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.030 ns  ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|cpu_0_data_master_dbs_address[1]                          ; SRAM_DQ[12]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.030 ns  ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|cpu_0_data_master_dbs_address[1]                          ; SRAM_DQ[13]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.030 ns  ; system_0:u0|cpu_0:the_cpu_0|ic_fill_tag[11]                                                                              ; SRAM_DQ[11]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.030 ns  ; system_0:u0|cpu_0:the_cpu_0|d_address[21]                                                                                ; SRAM_OE_N     ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.029 ns  ; system_0:u0|cpu_0:the_cpu_0|ic_fill_tag[8]                                                                               ; SRAM_DQ[10]   ; CLOCK_50   ;
; N/A                                     ; None                                                ; 11.029 ns  ; system_0:u0|cpu_0:the_cpu_0|ic_fill_tag[8]                                                                               ; SRAM_DQ[11]   ; CLOCK_50   ;
; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ;            ;                                                                                                                          ;               ;            ;
+-----------------------------------------+-----------------------------------------------------+------------+--------------------------------------------------------------------------------------------------------------------------+---------------+------------+


+----------------------------------------------------------------------------------------------+
; tpd                                                                                          ;
+-------+-------------------+-----------------+--------------------------+---------------------+
; Slack ; Required P2P Time ; Actual P2P Time ; From                     ; To                  ;
+-------+-------------------+-----------------+--------------------------+---------------------+
; N/A   ; None              ; 8.809 ns        ; AUD_DACLRCK              ; AUD_ADCLRCK         ;
; N/A   ; None              ; 2.612 ns        ; altera_internal_jtag~TDO ; altera_reserved_tdo ;
+-------+-------------------+-----------------+--------------------------+---------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; th                                                                                                                                                                                                                                                                                                                                                                                                     ;
+-----------------------------------------+-----------------------------------------------------+-----------+----------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------+
; Minimum Slack                           ; Required th                                         ; Actual th ; From                             ; To                                                                                                                                                                                                                       ; To Clock                     ;
+-----------------------------------------+-----------------------------------------------------+-----------+----------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------+
; N/A                                     ; None                                                ; 1.643 ns  ; altera_internal_jtag~TMSUTAP     ; sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|tms_cnt[0]                                                                                                                                                ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 1.612 ns  ; altera_internal_jtag~TMSUTAP     ; sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[5]                                                                                                                                                  ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 1.530 ns  ; altera_internal_jtag~TMSUTAP     ; sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[7]                                                                                                                                                  ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 1.530 ns  ; altera_internal_jtag~TMSUTAP     ; sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[2]                                                                                                                                                  ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 1.529 ns  ; altera_internal_jtag~TMSUTAP     ; sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[14]                                                                                                                                                 ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 1.528 ns  ; altera_internal_jtag~TMSUTAP     ; sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[10]                                                                                                                                                 ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 1.526 ns  ; altera_internal_jtag~TMSUTAP     ; sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[12]                                                                                                                                                 ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 1.525 ns  ; altera_internal_jtag             ; sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[6]                                                                                                                                                                                 ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 1.522 ns  ; altera_internal_jtag~TMSUTAP     ; sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[0]                                                                                                                                                  ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 1.522 ns  ; altera_internal_jtag~TMSUTAP     ; sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3]                                                                                                                                                  ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 1.386 ns  ; altera_internal_jtag~TMSUTAP     ; sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[15]                                                                                                                                                 ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 1.386 ns  ; altera_internal_jtag~TMSUTAP     ; sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|tms_cnt[2]                                                                                                                                                ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 1.386 ns  ; altera_internal_jtag~TMSUTAP     ; sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|tms_cnt[1]                                                                                                                                                ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 1.363 ns  ; altera_internal_jtag             ; sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0]                                                                                                                                                                              ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 1.360 ns  ; altera_internal_jtag             ; sld_hub:sld_hub_inst|sld_dffex:IRF_ENA_0|Q[0]                                                                                                                                                                            ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 1.353 ns  ; altera_internal_jtag~TMSUTAP     ; sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[8]                                                                                                                                                  ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 1.345 ns  ; altera_internal_jtag             ; sld_hub:sld_hub_inst|HUB_BYPASS_REG                                                                                                                                                                                      ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 1.324 ns  ; altera_internal_jtag             ; sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[9]                                                                                                                                                               ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 1.318 ns  ; altera_internal_jtag             ; sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[1]                                                                                                                                                                              ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 1.272 ns  ; altera_internal_jtag~TMSUTAP     ; sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[4]                                                                                                                                                  ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 1.272 ns  ; altera_internal_jtag~TMSUTAP     ; sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[6]                                                                                                                                                  ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 1.264 ns  ; altera_internal_jtag~TMSUTAP     ; sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[1]                                                                                                                                                  ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 1.264 ns  ; altera_internal_jtag~TMSUTAP     ; sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[11]                                                                                                                                                 ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 1.264 ns  ; altera_internal_jtag~TMSUTAP     ; sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[13]                                                                                                                                                 ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 1.259 ns  ; altera_internal_jtag~TMSUTAP     ; sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[9]                                                                                                                                                  ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 1.229 ns  ; altera_internal_jtag             ; sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[3]                                                                                                                                                                  ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 1.112 ns  ; altera_internal_jtag             ; system_0:u0|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|wdata[7]                                                                                                                         ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 0.975 ns  ; altera_internal_jtag             ; system_0:u0|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|wdata[0]                                                                                                                         ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 0.859 ns  ; altera_internal_jtag~TMSUTAP     ; sld_hub:sld_hub_inst|jtag_debug_mode                                                                                                                                                                                     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 0.831 ns  ; altera_internal_jtag             ; system_0:u0|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|write_stalled                                                                                                                    ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 0.750 ns  ; altera_internal_jtag             ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[37]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 0.648 ns  ; altera_internal_jtag~TMSUTAP     ; sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_aoi:auto_generated|dffe1a[7]                                                                                                                                  ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 0.648 ns  ; altera_internal_jtag~TMSUTAP     ; sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_aoi:auto_generated|dffe1a[1]                                                                                                                                  ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 0.648 ns  ; altera_internal_jtag~TMSUTAP     ; sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_aoi:auto_generated|dffe1a[2]                                                                                                                                  ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 0.648 ns  ; altera_internal_jtag~TMSUTAP     ; sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_aoi:auto_generated|dffe1a[3]                                                                                                                                  ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 0.648 ns  ; altera_internal_jtag~TMSUTAP     ; sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_aoi:auto_generated|dffe1a[0]                                                                                                                                  ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 0.559 ns  ; altera_internal_jtag~TMSUTAP     ; sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0]                                                                                                                                                                              ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 0.559 ns  ; altera_internal_jtag~TMSUTAP     ; sld_hub:sld_hub_inst|sld_dffex:IRF_ENA_0|Q[0]                                                                                                                                                                            ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 0.559 ns  ; altera_internal_jtag~TMSUTAP     ; sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[1]                                                                                                                                                                              ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 0.442 ns  ; altera_internal_jtag             ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[0]                           ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 0.262 ns  ; altera_internal_jtag             ; sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_aoi:auto_generated|dffe1a[7]                                                                                                                                  ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 0.262 ns  ; altera_internal_jtag             ; sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_aoi:auto_generated|dffe1a[1]                                                                                                                                  ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 0.262 ns  ; altera_internal_jtag             ; sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_aoi:auto_generated|dffe1a[2]                                                                                                                                  ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 0.262 ns  ; altera_internal_jtag             ; sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_aoi:auto_generated|dffe1a[3]                                                                                                                                  ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 0.262 ns  ; altera_internal_jtag             ; sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_aoi:auto_generated|dffe1a[0]                                                                                                                                  ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 0.221 ns  ; altera_internal_jtag             ; system_0:u0|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|td_shift[10]                                                                                                                     ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 0.165 ns  ; altera_internal_jtag             ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[15]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; 0.023 ns  ; altera_internal_jtag             ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[35]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -0.106 ns ; altera_internal_jtag             ; system_0:u0|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|count[9]                                                                                                                         ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -0.112 ns ; altera_internal_jtag             ; system_0:u0|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|td_shift[0]                                                                                                                      ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -0.319 ns ; altera_internal_jtag             ; system_0:u0|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|state                                                                                                                            ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -1.133 ns ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|st_shiftdr                      ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -1.520 ns ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[7]                           ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -1.890 ns ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|in_between_shiftdr_and_updatedr ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.088 ns ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[35]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.127 ns ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[0]                           ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.193 ns ; I2C_SDAT                         ; I2C_AV_Config:u1|I2C_Controller:u0|ACK3                                                                                                                                                                                  ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -2.230 ns ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[31]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.237 ns ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[12]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.250 ns ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[30]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.251 ns ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[19]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.252 ns ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[28]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.256 ns ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[26]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.256 ns ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[15]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.261 ns ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[13]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.261 ns ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[14]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.269 ns ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[27]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.271 ns ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[29]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.274 ns ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[32]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.337 ns ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[22]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.338 ns ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[24]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.343 ns ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|DRsize.100                      ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.343 ns ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|DRsize.010                      ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.408 ns ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|DRsize.000                      ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.447 ns ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[34]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.447 ns ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[25]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.514 ns ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[20]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.523 ns ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[21]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.527 ns ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[23]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.536 ns ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[11]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.539 ns ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[8]                           ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.546 ns ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[9]                           ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.563 ns ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[16]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.563 ns ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[18]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.565 ns ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[5]                           ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.572 ns ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[6]                           ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.573 ns ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[10]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.587 ns ; I2C_SDAT                         ; I2C_AV_Config:u1|I2C_Controller:u0|ACK2                                                                                                                                                                                  ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -2.623 ns ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[4]                           ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.628 ns ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[3]                           ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.632 ns ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[2]                           ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.633 ns ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[1]                           ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.865 ns ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[36]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.865 ns ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[37]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.883 ns ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[17]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.894 ns ; I2C_SDAT                         ; I2C_AV_Config:u1|I2C_Controller:u0|ACK1                                                                                                                                                                                  ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -2.960 ns ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[35]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.960 ns ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[31]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.965 ns ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[12]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.965 ns ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[13]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.965 ns ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[14]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.965 ns ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[15]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.965 ns ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[0]                           ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.978 ns ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[34]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.978 ns ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[32]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.978 ns ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[33]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.997 ns ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[25]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.997 ns ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[26]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.997 ns ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[27]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.997 ns ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[28]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.997 ns ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[29]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -2.997 ns ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[30]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -3.065 ns ; altera_internal_jtag~SHIFTUSER   ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[33]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -3.082 ns ; DRAM_DQ[15]                      ; system_0:u0|sdram_0:the_sdram_0|za_data[15]                                                                                                                                                                              ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -3.089 ns ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[22]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -3.089 ns ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[23]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -3.089 ns ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[24]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -3.089 ns ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[21]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -3.089 ns ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[19]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -3.089 ns ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[20]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -3.091 ns ; DRAM_DQ[8]                       ; system_0:u0|sdram_0:the_sdram_0|za_data[8]                                                                                                                                                                               ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -3.095 ns ; DRAM_DQ[0]                       ; system_0:u0|sdram_0:the_sdram_0|za_data[0]                                                                                                                                                                               ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -3.098 ns ; DRAM_DQ[3]                       ; system_0:u0|sdram_0:the_sdram_0|za_data[3]                                                                                                                                                                               ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -3.098 ns ; DRAM_DQ[6]                       ; system_0:u0|sdram_0:the_sdram_0|za_data[6]                                                                                                                                                                               ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -3.098 ns ; DRAM_DQ[4]                       ; system_0:u0|sdram_0:the_sdram_0|za_data[4]                                                                                                                                                                               ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -3.098 ns ; DRAM_DQ[5]                       ; system_0:u0|sdram_0:the_sdram_0|za_data[5]                                                                                                                                                                               ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -3.106 ns ; DRAM_DQ[12]                      ; system_0:u0|sdram_0:the_sdram_0|za_data[12]                                                                                                                                                                              ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -3.106 ns ; DRAM_DQ[11]                      ; system_0:u0|sdram_0:the_sdram_0|za_data[11]                                                                                                                                                                              ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -3.116 ns ; DRAM_DQ[14]                      ; system_0:u0|sdram_0:the_sdram_0|za_data[14]                                                                                                                                                                              ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -3.116 ns ; DRAM_DQ[13]                      ; system_0:u0|sdram_0:the_sdram_0|za_data[13]                                                                                                                                                                              ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -3.121 ns ; DRAM_DQ[9]                       ; system_0:u0|sdram_0:the_sdram_0|za_data[9]                                                                                                                                                                               ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -3.121 ns ; DRAM_DQ[7]                       ; system_0:u0|sdram_0:the_sdram_0|za_data[7]                                                                                                                                                                               ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -3.121 ns ; DRAM_DQ[10]                      ; system_0:u0|sdram_0:the_sdram_0|za_data[10]                                                                                                                                                                              ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -3.125 ns ; DRAM_DQ[2]                       ; system_0:u0|sdram_0:the_sdram_0|za_data[2]                                                                                                                                                                               ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -3.125 ns ; DRAM_DQ[1]                       ; system_0:u0|sdram_0:the_sdram_0|za_data[1]                                                                                                                                                                               ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -3.308 ns ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[17]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -3.308 ns ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[16]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -3.308 ns ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[18]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -3.319 ns ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|ir[0]                           ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -3.319 ns ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|ir[1]                           ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -3.334 ns ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[11]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -3.334 ns ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[10]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -3.334 ns ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[5]                           ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -3.334 ns ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[6]                           ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -3.334 ns ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[7]                           ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -3.334 ns ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[8]                           ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -3.334 ns ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[9]                           ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -3.541 ns ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[3]                           ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -3.541 ns ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[4]                           ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -3.541 ns ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[2]                           ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -3.541 ns ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[1]                           ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -4.161 ns ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[36]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -4.161 ns ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[37]                          ; altera_internal_jtag~TCKUTAP ;
; N/A                                     ; None                                                ; -4.173 ns ; KEY[0]                           ; I2C_AV_Config:u1|I2C_Controller:u0|SD[22]                                                                                                                                                                                ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -4.245 ns ; KEY[0]                           ; I2C_AV_Config:u1|I2C_Controller:u0|SD[15]                                                                                                                                                                                ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -4.245 ns ; KEY[0]                           ; I2C_AV_Config:u1|I2C_Controller:u0|SD[14]                                                                                                                                                                                ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -4.245 ns ; KEY[0]                           ; I2C_AV_Config:u1|I2C_Controller:u0|SD[13]                                                                                                                                                                                ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -4.245 ns ; KEY[0]                           ; I2C_AV_Config:u1|I2C_Controller:u0|SD[12]                                                                                                                                                                                ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -4.245 ns ; KEY[0]                           ; I2C_AV_Config:u1|I2C_Controller:u0|SD[11]                                                                                                                                                                                ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -4.245 ns ; KEY[0]                           ; I2C_AV_Config:u1|I2C_Controller:u0|SD[10]                                                                                                                                                                                ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -4.245 ns ; KEY[0]                           ; I2C_AV_Config:u1|I2C_Controller:u0|SD[9]                                                                                                                                                                                 ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -4.245 ns ; KEY[0]                           ; I2C_AV_Config:u1|I2C_Controller:u0|SD[8]                                                                                                                                                                                 ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -4.245 ns ; KEY[0]                           ; I2C_AV_Config:u1|I2C_Controller:u0|SD[7]                                                                                                                                                                                 ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -4.245 ns ; KEY[0]                           ; I2C_AV_Config:u1|I2C_Controller:u0|SD[6]                                                                                                                                                                                 ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -4.245 ns ; KEY[0]                           ; I2C_AV_Config:u1|I2C_Controller:u0|SD[5]                                                                                                                                                                                 ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -4.245 ns ; KEY[0]                           ; I2C_AV_Config:u1|I2C_Controller:u0|SD[4]                                                                                                                                                                                 ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -4.245 ns ; KEY[0]                           ; I2C_AV_Config:u1|I2C_Controller:u0|SD[3]                                                                                                                                                                                 ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -4.245 ns ; KEY[0]                           ; I2C_AV_Config:u1|I2C_Controller:u0|SD[2]                                                                                                                                                                                 ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -4.245 ns ; KEY[0]                           ; I2C_AV_Config:u1|I2C_Controller:u0|SD[1]                                                                                                                                                                                 ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -4.245 ns ; KEY[0]                           ; I2C_AV_Config:u1|I2C_Controller:u0|SD[0]                                                                                                                                                                                 ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -4.451 ns ; altera_internal_jtag~RUNIDLEUSER ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_nios2_oci_debug:the_cpu_0_nios2_oci_debug|monitor_go                                                                                               ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -4.526 ns ; KEY[0]                           ; I2C_AV_Config:u1|mI2C_DATA[22]                                                                                                                                                                                           ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -4.732 ns ; KEY[0]                           ; I2C_AV_Config:u1|altsyncram:Ram0_rtl_0|altsyncram_mj01:auto_generated|ram_block1a0~porta_address_reg0                                                                                                                    ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -4.732 ns ; KEY[0]                           ; I2C_AV_Config:u1|altsyncram:Ram0_rtl_0|altsyncram_mj01:auto_generated|ram_block1a0~porta_address_reg1                                                                                                                    ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -4.732 ns ; KEY[0]                           ; I2C_AV_Config:u1|altsyncram:Ram0_rtl_0|altsyncram_mj01:auto_generated|ram_block1a0~porta_address_reg2                                                                                                                    ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -4.732 ns ; KEY[0]                           ; I2C_AV_Config:u1|altsyncram:Ram0_rtl_0|altsyncram_mj01:auto_generated|ram_block1a0~porta_address_reg3                                                                                                                    ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -4.732 ns ; KEY[0]                           ; I2C_AV_Config:u1|altsyncram:Ram0_rtl_0|altsyncram_mj01:auto_generated|ram_block1a0~porta_address_reg4                                                                                                                    ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -4.732 ns ; KEY[0]                           ; I2C_AV_Config:u1|altsyncram:Ram0_rtl_0|altsyncram_mj01:auto_generated|ram_block1a0~porta_address_reg5                                                                                                                    ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -5.461 ns ; altera_internal_jtag~UPDATEUSER  ; system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|dr_update1                      ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -5.480 ns ; FL_DQ[1]                         ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|incoming_tri_state_bridge_0_data[1]                                                                                           ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -5.480 ns ; FL_DQ[0]                         ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|incoming_tri_state_bridge_0_data[0]                                                                                           ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -5.498 ns ; FL_DQ[7]                         ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|incoming_tri_state_bridge_0_data[7]                                                                                           ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -5.498 ns ; FL_DQ[6]                         ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|incoming_tri_state_bridge_0_data[6]                                                                                           ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -5.498 ns ; FL_DQ[5]                         ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|incoming_tri_state_bridge_0_data[5]                                                                                           ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -5.498 ns ; FL_DQ[4]                         ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|incoming_tri_state_bridge_0_data[4]                                                                                           ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -5.500 ns ; FL_DQ[2]                         ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|incoming_tri_state_bridge_0_data[2]                                                                                           ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -5.500 ns ; FL_DQ[3]                         ; system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|incoming_tri_state_bridge_0_data[3]                                                                                           ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -5.858 ns ; SRAM_DQ[14]                      ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[14]                                                                                                                                  ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -5.858 ns ; SRAM_DQ[11]                      ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|dbs_16_reg_segment_0[11]                                                                                                                    ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -6.013 ns ; SRAM_DQ[7]                       ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|dbs_16_reg_segment_0[7]                                                                                                                     ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -6.093 ns ; SRAM_DQ[12]                      ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[12]                                                                                                                                  ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -6.145 ns ; KEY[3]                           ; system_0:u0|button_pio:the_button_pio|d1_data_in[3]                                                                                                                                                                      ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -6.146 ns ; KEY[3]                           ; system_0:u0|button_pio:the_button_pio|readdata[3]                                                                                                                                                                        ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -6.228 ns ; SRAM_DQ[13]                      ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|dbs_16_reg_segment_0[13]                                                                                                                    ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -6.269 ns ; SRAM_DQ[15]                      ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[15]                                                                                                                                  ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -6.271 ns ; SRAM_DQ[11]                      ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[11]                                                                                                                                  ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -6.293 ns ; SRAM_DQ[10]                      ; system_0:u0|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|dbs_16_reg_segment_0[10]                                                                                                                    ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -6.328 ns ; SRAM_DQ[1]                       ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[1]                                                                                                                                   ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -6.328 ns ; SRAM_DQ[13]                      ; system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_16_reg_segment_0[13]                                                                                                                                  ; CLOCK_50                     ;
; N/A                                     ; None                                                ; -6.331 ns ; SRAM_DQ[14]                      ; system_0:u0|cpu_0:the_cpu_0|i_readdata_d1[30]                                                                                                                                                                            ; CLOCK_50                     ;
; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ;           ;                                  ;                                                                                                                                                                                                                          ;                              ;
+-----------------------------------------+-----------------------------------------------------+-----------+----------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Ignored Timing Assignments                                                                                                                                                                                                                                                               ;
+-----------------+------------+----------------------------+---------------------------------------------------------------------------------------------------------------------+---------------------------------------+----------------------------------------------------------------+
; Option          ; Setting    ; From                       ; To                                                                                                                  ; Entity Name                           ; Help                                                           ;
+-----------------+------------+----------------------------+---------------------------------------------------------------------------------------------------------------------+---------------------------------------+----------------------------------------------------------------+
; Clock Settings  ; Clock 27   ;                            ; CLOCK_27                                                                                                            ;                                       ; No timing path applicable to specified destination             ;
; Cut Timing Path ; On         ; slave_address_d1[0]        ; *                                                                                                                   ; clock_0                               ; Node named slave_address_d1[0] removed during synthesis        ;
; Cut Timing Path ; On         ; slave_nativeaddress_d1[0]  ; *                                                                                                                   ; clock_0                               ; Node named slave_nativeaddress_d1[0] removed during synthesis  ;
; Cut Timing Path ; On         ; slave_nativeaddress_d1[10] ; *                                                                                                                   ; clock_0                               ; Node named slave_nativeaddress_d1[10] removed during synthesis ;
; Cut Timing Path ; On         ; slave_nativeaddress_d1[11] ; *                                                                                                                   ; clock_0                               ; Node named slave_nativeaddress_d1[11] removed during synthesis ;
; Cut Timing Path ; On         ; slave_nativeaddress_d1[12] ; *                                                                                                                   ; clock_0                               ; Node named slave_nativeaddress_d1[12] removed during synthesis ;
; Cut Timing Path ; On         ; slave_nativeaddress_d1[13] ; *                                                                                                                   ; clock_0                               ; Node named slave_nativeaddress_d1[13] removed during synthesis ;
; Cut Timing Path ; On         ; slave_nativeaddress_d1[14] ; *                                                                                                                   ; clock_0                               ; Node named slave_nativeaddress_d1[14] removed during synthesis ;
; Cut Timing Path ; On         ; slave_nativeaddress_d1[15] ; *                                                                                                                   ; clock_0                               ; Node named slave_nativeaddress_d1[15] removed during synthesis ;
; Cut Timing Path ; On         ; slave_nativeaddress_d1[16] ; *                                                                                                                   ; clock_0                               ; Node named slave_nativeaddress_d1[16] removed during synthesis ;
; Cut Timing Path ; On         ; slave_nativeaddress_d1[17] ; *                                                                                                                   ; clock_0                               ; Node named slave_nativeaddress_d1[17] removed during synthesis ;
; Cut Timing Path ; On         ; slave_nativeaddress_d1[18] ; *                                                                                                                   ; clock_0                               ; Node named slave_nativeaddress_d1[18] removed during synthesis ;
; Cut Timing Path ; On         ; slave_nativeaddress_d1[19] ; *                                                                                                                   ; clock_0                               ; Node named slave_nativeaddress_d1[19] removed during synthesis ;
; Cut Timing Path ; On         ; slave_nativeaddress_d1[1]  ; *                                                                                                                   ; clock_0                               ; Node named slave_nativeaddress_d1[1] removed during synthesis  ;
; Cut Timing Path ; On         ; slave_nativeaddress_d1[20] ; *                                                                                                                   ; clock_0                               ; Node named slave_nativeaddress_d1[20] removed during synthesis ;
; Cut Timing Path ; On         ; slave_nativeaddress_d1[21] ; *                                                                                                                   ; clock_0                               ; Node named slave_nativeaddress_d1[21] removed during synthesis ;
; Cut Timing Path ; On         ; slave_nativeaddress_d1[2]  ; *                                                                                                                   ; clock_0                               ; Node named slave_nativeaddress_d1[2] removed during synthesis  ;
; Cut Timing Path ; On         ; slave_nativeaddress_d1[3]  ; *                                                                                                                   ; clock_0                               ; Node named slave_nativeaddress_d1[3] removed during synthesis  ;
; Cut Timing Path ; On         ; slave_nativeaddress_d1[4]  ; *                                                                                                                   ; clock_0                               ; Node named slave_nativeaddress_d1[4] removed during synthesis  ;
; Cut Timing Path ; On         ; slave_nativeaddress_d1[5]  ; *                                                                                                                   ; clock_0                               ; Node named slave_nativeaddress_d1[5] removed during synthesis  ;
; Cut Timing Path ; On         ; slave_nativeaddress_d1[6]  ; *                                                                                                                   ; clock_0                               ; Node named slave_nativeaddress_d1[6] removed during synthesis  ;
; Cut Timing Path ; On         ; slave_nativeaddress_d1[7]  ; *                                                                                                                   ; clock_0                               ; Node named slave_nativeaddress_d1[7] removed during synthesis  ;
; Cut Timing Path ; On         ; slave_nativeaddress_d1[8]  ; *                                                                                                                   ; clock_0                               ; Node named slave_nativeaddress_d1[8] removed during synthesis  ;
; Cut Timing Path ; On         ; slave_nativeaddress_d1[9]  ; *                                                                                                                   ; clock_0                               ; Node named slave_nativeaddress_d1[9] removed during synthesis  ;
; Cut Timing Path ; On         ; data_in_d1                 ; *                                                                                                                   ; clock_0_bit_pipe                      ; Node named data_in_d1 removed during synthesis                 ;
; Maximum Delay   ; 100ns      ;                            ; data_in_d1                                                                                                          ; clock_0_master_write_done_sync_module ; Node named data_in_d1 removed during synthesis                 ;
; Cut Timing Path ; On         ; slave_address_d1[0]        ; *                                                                                                                   ; clock_1                               ; Node named slave_address_d1[0] removed during synthesis        ;
; Cut Timing Path ; On         ; slave_nativeaddress_d1[0]  ; *                                                                                                                   ; clock_1                               ; Node named slave_nativeaddress_d1[0] removed during synthesis  ;
; Cut Timing Path ; On         ; slave_nativeaddress_d1[10] ; *                                                                                                                   ; clock_1                               ; Node named slave_nativeaddress_d1[10] removed during synthesis ;
; Cut Timing Path ; On         ; slave_nativeaddress_d1[11] ; *                                                                                                                   ; clock_1                               ; Node named slave_nativeaddress_d1[11] removed during synthesis ;
; Cut Timing Path ; On         ; slave_nativeaddress_d1[12] ; *                                                                                                                   ; clock_1                               ; Node named slave_nativeaddress_d1[12] removed during synthesis ;
; Cut Timing Path ; On         ; slave_nativeaddress_d1[13] ; *                                                                                                                   ; clock_1                               ; Node named slave_nativeaddress_d1[13] removed during synthesis ;
; Cut Timing Path ; On         ; slave_nativeaddress_d1[14] ; *                                                                                                                   ; clock_1                               ; Node named slave_nativeaddress_d1[14] removed during synthesis ;
; Cut Timing Path ; On         ; slave_nativeaddress_d1[15] ; *                                                                                                                   ; clock_1                               ; Node named slave_nativeaddress_d1[15] removed during synthesis ;
; Cut Timing Path ; On         ; slave_nativeaddress_d1[16] ; *                                                                                                                   ; clock_1                               ; Node named slave_nativeaddress_d1[16] removed during synthesis ;
; Cut Timing Path ; On         ; slave_nativeaddress_d1[17] ; *                                                                                                                   ; clock_1                               ; Node named slave_nativeaddress_d1[17] removed during synthesis ;
; Cut Timing Path ; On         ; slave_nativeaddress_d1[18] ; *                                                                                                                   ; clock_1                               ; Node named slave_nativeaddress_d1[18] removed during synthesis ;
; Cut Timing Path ; On         ; slave_nativeaddress_d1[19] ; *                                                                                                                   ; clock_1                               ; Node named slave_nativeaddress_d1[19] removed during synthesis ;
; Cut Timing Path ; On         ; slave_nativeaddress_d1[1]  ; *                                                                                                                   ; clock_1                               ; Node named slave_nativeaddress_d1[1] removed during synthesis  ;
; Cut Timing Path ; On         ; slave_nativeaddress_d1[20] ; *                                                                                                                   ; clock_1                               ; Node named slave_nativeaddress_d1[20] removed during synthesis ;
; Cut Timing Path ; On         ; slave_nativeaddress_d1[21] ; *                                                                                                                   ; clock_1                               ; Node named slave_nativeaddress_d1[21] removed during synthesis ;
; Cut Timing Path ; On         ; slave_nativeaddress_d1[2]  ; *                                                                                                                   ; clock_1                               ; Node named slave_nativeaddress_d1[2] removed during synthesis  ;
; Cut Timing Path ; On         ; slave_nativeaddress_d1[3]  ; *                                                                                                                   ; clock_1                               ; Node named slave_nativeaddress_d1[3] removed during synthesis  ;
; Cut Timing Path ; On         ; slave_nativeaddress_d1[4]  ; *                                                                                                                   ; clock_1                               ; Node named slave_nativeaddress_d1[4] removed during synthesis  ;
; Cut Timing Path ; On         ; slave_nativeaddress_d1[5]  ; *                                                                                                                   ; clock_1                               ; Node named slave_nativeaddress_d1[5] removed during synthesis  ;
; Cut Timing Path ; On         ; slave_nativeaddress_d1[6]  ; *                                                                                                                   ; clock_1                               ; Node named slave_nativeaddress_d1[6] removed during synthesis  ;
; Cut Timing Path ; On         ; slave_nativeaddress_d1[7]  ; *                                                                                                                   ; clock_1                               ; Node named slave_nativeaddress_d1[7] removed during synthesis  ;
; Cut Timing Path ; On         ; slave_nativeaddress_d1[8]  ; *                                                                                                                   ; clock_1                               ; Node named slave_nativeaddress_d1[8] removed during synthesis  ;
; Cut Timing Path ; On         ; slave_nativeaddress_d1[9]  ; *                                                                                                                   ; clock_1                               ; Node named slave_nativeaddress_d1[9] removed during synthesis  ;
; Cut Timing Path ; On         ; data_in_d1                 ; *                                                                                                                   ; clock_1_bit_pipe                      ; Node named data_in_d1 removed during synthesis                 ;
; MAX_DELAY       ; 100.000 ns ;                            ; system_0:u0|system_0_reset_clk_50_domain_synch_module:system_0_reset_clk_50_domain_synch|data_in_d1                 ;                                       ; Assignment is illegal for node and/or path                     ;
; MAX_DELAY       ; 100.000 ns ;                            ; system_0:u0|clock_0:the_clock_0|clock_0_slave_write_request_sync_module:clock_0_slave_write_request_sync|data_in_d1 ;                                       ; Assignment is illegal for node and/or path                     ;
; MAX_DELAY       ; 100.000 ns ;                            ; system_0:u0|system_0_reset_clk_domain_synch_module:system_0_reset_clk_domain_synch|data_in_d1                       ;                                       ; Assignment is illegal for node and/or path                     ;
+-----------------+------------+----------------------------+---------------------------------------------------------------------------------------------------------------------+---------------------------------------+----------------------------------------------------------------+


+--------------------------+
; Timing Analyzer Messages ;
+--------------------------+
Info: *******************************************************************
Info: Running Quartus II Timing Analyzer
    Info: Version 6.0 Build 178 04/27/2006 SJ Web Edition
    Info: Processing started: Sun Apr 08 00:55:33 2007
Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off DE2_NIOS_DEVICE_LED -c DE2_NIOS_DEVICE_LED --timing_analysis_only
Warning: Timing Analysis is analyzing one or more combinational loops as latches
    Warning: Node "system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|st_updateir~7" is a latch
    Warning: Node "system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|st_updatedr~8" is a latch
Warning: Clock latency analysis for PLL offsets is supported for the current device family, but is not enabled
Warning: Found pins functioning as undefined clocks and/or memory enables
    Info: Assuming node "altera_internal_jtag~TCKUTAP" is an undefined clock
    Info: Assuming node "altera_internal_jtag~UPDATEUSER" is a latch enable and/or memory write/read enable. Will not compute fmax for this pin.
Warning: Clock Setting "CLOCK_27" is unassigned
Warning: Found 1 node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew
    Info: Detected ripple clock "I2C_AV_Config:u1|mI2C_CTRL_CLK" as buffer
Info: Found timing assignments -- calculating delays
Info: No valid register-to-register data paths exist for clock "SDRAM_PLL:PLL1|altpll:altpll_component|_clk0"
Info: Slack time is 526 ps for clock "SDRAM_PLL:PLL1|altpll:altpll_component|_clk1" between source register "system_0:u0|cpu_0:the_cpu_0|d_address[23]" and destination register "system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_2[6]"
    Info: Fmax is 105.55 MHz (period= 9.474 ns)
    Info: + Largest register to register requirement is 9.803 ns
        Info: + Setup relationship between source and destination is 10.000 ns
            Info: + Latch edge is 7.642 ns
                Info: Clock period of Destination clock "SDRAM_PLL:PLL1|altpll:altpll_component|_clk1" is 10.000 ns with  offset of -2.358 ns and duty cycle of 50
                Info: Multicycle Setup factor for Destination register is 1
            Info: - Launch edge is -2.358 ns
                Info: Clock period of Source clock "SDRAM_PLL:PLL1|altpll:altpll_component|_clk1" is 10.000 ns with  offset of -2.358 ns and duty cycle of 50
                Info: Multicycle Setup factor for Source register is 1
        Info: + Largest clock skew is 0.017 ns
            Info: + Shortest clock path from clock "SDRAM_PLL:PLL1|altpll:altpll_component|_clk1" to destination register is 2.649 ns
                Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_1; Fanout = 1; CLK Node = 'SDRAM_PLL:PLL1|altpll:altpll_component|_clk1'
                Info: 2: + IC(1.091 ns) + CELL(0.000 ns) = 1.091 ns; Loc. = CLKCTRL_G3; Fanout = 3158; COMB Node = 'SDRAM_PLL:PLL1|altpll:altpll_component|_clk1~clkctrl'
                Info: 3: + IC(1.021 ns) + CELL(0.537 ns) = 2.649 ns; Loc. = LCFF_X23_Y13_N13; Fanout = 1; REG Node = 'system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_2[6]'
                Info: Total cell delay = 0.537 ns ( 20.27 % )
                Info: Total interconnect delay = 2.112 ns ( 79.73 % )
            Info: - Longest clock path from clock "SDRAM_PLL:PLL1|altpll:altpll_component|_clk1" to source register is 2.632 ns
                Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_1; Fanout = 1; CLK Node = 'SDRAM_PLL:PLL1|altpll:altpll_component|_clk1'
                Info: 2: + IC(1.091 ns) + CELL(0.000 ns) = 1.091 ns; Loc. = CLKCTRL_G3; Fanout = 3158; COMB Node = 'SDRAM_PLL:PLL1|altpll:altpll_component|_clk1~clkctrl'
                Info: 3: + IC(1.004 ns) + CELL(0.537 ns) = 2.632 ns; Loc. = LCFF_X21_Y11_N15; Fanout = 5; REG Node = 'system_0:u0|cpu_0:the_cpu_0|d_address[23]'
                Info: Total cell delay = 0.537 ns ( 20.40 % )
                Info: Total interconnect delay = 2.095 ns ( 79.60 % )
        Info: - Micro clock to output delay of source is 0.250 ns
        Info: - Micro setup delay of destination is -0.036 ns
    Info: - Longest register to register delay is 9.277 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X21_Y11_N15; Fanout = 5; REG Node = 'system_0:u0|cpu_0:the_cpu_0|d_address[23]'
        Info: 2: + IC(1.960 ns) + CELL(0.371 ns) = 2.331 ns; Loc. = LCCOMB_X21_Y11_N10; Fanout = 42; COMB Node = 'system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|cpu_0_data_master_requests_cfi_flash_0_s1'
        Info: 3: + IC(1.289 ns) + CELL(0.150 ns) = 3.770 ns; Loc. = LCCOMB_X20_Y12_N14; Fanout = 1; COMB Node = 'system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|cpu_0_data_master_qualified_request_cfi_flash_0_s1~175'
        Info: 4: + IC(0.262 ns) + CELL(0.275 ns) = 4.307 ns; Loc. = LCCOMB_X20_Y12_N4; Fanout = 12; COMB Node = 'system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|cpu_0_data_master_qualified_request_cfi_flash_0_s1~176'
        Info: 5: + IC(0.286 ns) + CELL(0.275 ns) = 4.868 ns; Loc. = LCCOMB_X20_Y12_N26; Fanout = 33; COMB Node = 'system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_avalon_slave_grant_vector[1]~31'
        Info: 6: + IC(0.784 ns) + CELL(0.150 ns) = 5.802 ns; Loc. = LCCOMB_X20_Y8_N2; Fanout = 10; COMB Node = 'system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|in_a_write_cycle~16'
        Info: 7: + IC(0.964 ns) + CELL(0.271 ns) = 7.037 ns; Loc. = LCCOMB_X24_Y9_N6; Fanout = 1; COMB Node = 'system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_count_enable~595'
        Info: 8: + IC(0.242 ns) + CELL(0.150 ns) = 7.429 ns; Loc. = LCCOMB_X24_Y9_N2; Fanout = 6; COMB Node = 'system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_count_enable~596'
        Info: 9: + IC(0.268 ns) + CELL(0.150 ns) = 7.847 ns; Loc. = LCCOMB_X24_Y9_N14; Fanout = 8; COMB Node = 'system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|always7~18'
        Info: 10: + IC(0.770 ns) + CELL(0.660 ns) = 9.277 ns; Loc. = LCFF_X23_Y13_N13; Fanout = 1; REG Node = 'system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|dbs_8_reg_segment_2[6]'
        Info: Total cell delay = 2.452 ns ( 26.43 % )
        Info: Total interconnect delay = 6.825 ns ( 73.57 % )
Info: Slack time is 10.831 ns for clock "CLOCK_50" between source register "system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address" and destination register "system_0:u0|sdram_0:the_sdram_0|m_addr[5]"
    Info: Fmax is 109.06 MHz (period= 9.169 ns)
    Info: + Largest register to register requirement is 19.510 ns
        Info: + Setup relationship between source and destination is 20.000 ns
            Info: + Latch edge is 20.000 ns
                Info: Clock period of Destination clock "CLOCK_50" is 20.000 ns with  offset of 0.000 ns and duty cycle of 50
                Info: Multicycle Setup factor for Destination register is 1
            Info: - Launch edge is 0.000 ns
                Info: Clock period of Source clock "CLOCK_50" is 20.000 ns with  offset of 0.000 ns and duty cycle of 50
                Info: Multicycle Setup factor for Source register is 1
        Info: + Largest clock skew is -0.164 ns
            Info: + Shortest clock path from clock "CLOCK_50" to destination register is 2.493 ns
                Info: 1: + IC(0.000 ns) + CELL(0.999 ns) = 0.999 ns; Loc. = PIN_N2; Fanout = 3; CLK Node = 'CLOCK_50'
                Info: 2: + IC(0.118 ns) + CELL(0.000 ns) = 1.117 ns; Loc. = CLKCTRL_G2; Fanout = 487; COMB Node = 'CLOCK_50~clkctrl'
                Info: 3: + IC(1.089 ns) + CELL(0.287 ns) = 2.493 ns; Loc. = IOC_X0_Y10_N2; Fanout = 1; REG Node = 'system_0:u0|sdram_0:the_sdram_0|m_addr[5]'
                Info: Total cell delay = 1.286 ns ( 51.58 % )
                Info: Total interconnect delay = 1.207 ns ( 48.42 % )
            Info: - Longest clock path from clock "CLOCK_50" to source register is 2.657 ns
                Info: 1: + IC(0.000 ns) + CELL(0.999 ns) = 0.999 ns; Loc. = PIN_N2; Fanout = 3; CLK Node = 'CLOCK_50'
                Info: 2: + IC(0.118 ns) + CELL(0.000 ns) = 1.117 ns; Loc. = CLKCTRL_G2; Fanout = 487; COMB Node = 'CLOCK_50~clkctrl'
                Info: 3: + IC(1.003 ns) + CELL(0.537 ns) = 2.657 ns; Loc. = LCFF_X5_Y9_N25; Fanout = 42; REG Node = 'system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address'
                Info: Total cell delay = 1.536 ns ( 57.81 % )
                Info: Total interconnect delay = 1.121 ns ( 42.19 % )
        Info: - Micro clock to output delay of source is 0.250 ns
        Info: - Micro setup delay of destination is 0.076 ns
    Info: - Longest register to register delay is 8.679 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X5_Y9_N25; Fanout = 42; REG Node = 'system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_address'
        Info: 2: + IC(1.024 ns) + CELL(0.275 ns) = 1.299 ns; Loc. = LCCOMB_X9_Y9_N30; Fanout = 2; COMB Node = 'system_0:u0|sdram_0:the_sdram_0|sdram_0_input_efifo_module:the_sdram_0_input_efifo_module|rd_data[27]~426'
        Info: 3: + IC(1.031 ns) + CELL(0.393 ns) = 2.723 ns; Loc. = LCCOMB_X9_Y9_N4; Fanout = 1; COMB Node = 'system_0:u0|sdram_0:the_sdram_0|pending~267'
        Info: 4: + IC(0.658 ns) + CELL(0.275 ns) = 3.656 ns; Loc. = LCCOMB_X7_Y9_N10; Fanout = 3; COMB Node = 'system_0:u0|sdram_0:the_sdram_0|pending~271'
        Info: 5: + IC(0.673 ns) + CELL(0.393 ns) = 4.722 ns; Loc. = LCCOMB_X5_Y9_N10; Fanout = 8; COMB Node = 'system_0:u0|sdram_0:the_sdram_0|Selector41~33'
        Info: 6: + IC(0.706 ns) + CELL(0.275 ns) = 5.703 ns; Loc. = LCCOMB_X8_Y9_N26; Fanout = 1; COMB Node = 'system_0:u0|sdram_0:the_sdram_0|Selector89~180'
        Info: 7: + IC(1.107 ns) + CELL(0.420 ns) = 7.230 ns; Loc. = LCCOMB_X8_Y9_N10; Fanout = 1; COMB Node = 'system_0:u0|sdram_0:the_sdram_0|Selector89~181'
        Info: 8: + IC(1.180 ns) + CELL(0.269 ns) = 8.679 ns; Loc. = IOC_X0_Y10_N2; Fanout = 1; REG Node = 'system_0:u0|sdram_0:the_sdram_0|m_addr[5]'
        Info: Total cell delay = 2.300 ns ( 26.50 % )
        Info: Total interconnect delay = 6.379 ns ( 73.50 % )
Info: Clock "altera_internal_jtag~TCKUTAP" has Internal fmax of 139.55 MHz between source register "sld_hub:sld_hub_inst|jtag_debug_mode_usr1" and destination register "system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[11]" (period= 7.166 ns)
    Info: + Longest register to register delay is 6.925 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X35_Y16_N21; Fanout = 15; REG Node = 'sld_hub:sld_hub_inst|jtag_debug_mode_usr1'
        Info: 2: + IC(1.105 ns) + CELL(0.398 ns) = 1.503 ns; Loc. = LCCOMB_X34_Y14_N8; Fanout = 10; COMB Node = 'system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[35]~4756'
        Info: 3: + IC(0.753 ns) + CELL(0.420 ns) = 2.676 ns; Loc. = LCCOMB_X34_Y11_N8; Fanout = 23; COMB Node = 'system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[12]~4765'
        Info: 4: + IC(2.088 ns) + CELL(0.271 ns) = 5.035 ns; Loc. = LCCOMB_X31_Y10_N6; Fanout = 1; COMB Node = 'system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr~4838'
        Info: 5: + IC(0.263 ns) + CELL(0.438 ns) = 5.736 ns; Loc. = LCCOMB_X31_Y10_N8; Fanout = 1; COMB Node = 'system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr~4839'
        Info: 6: + IC(0.955 ns) + CELL(0.150 ns) = 6.841 ns; Loc. = LCCOMB_X34_Y11_N24; Fanout = 1; COMB Node = 'system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr~4840'
        Info: 7: + IC(0.000 ns) + CELL(0.084 ns) = 6.925 ns; Loc. = LCFF_X34_Y11_N25; Fanout = 2; REG Node = 'system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[11]'
        Info: Total cell delay = 1.761 ns ( 25.43 % )
        Info: Total interconnect delay = 5.164 ns ( 74.57 % )
    Info: - Smallest clock skew is -0.027 ns
        Info: + Shortest clock path from clock "altera_internal_jtag~TCKUTAP" to destination register is 4.397 ns
            Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = JTAG_X1_Y19_N0; Fanout = 1; CLK Node = 'altera_internal_jtag~TCKUTAP'
            Info: 2: + IC(2.874 ns) + CELL(0.000 ns) = 2.874 ns; Loc. = CLKCTRL_G0; Fanout = 191; COMB Node = 'altera_internal_jtag~TCKUTAPclkctrl'
            Info: 3: + IC(0.986 ns) + CELL(0.537 ns) = 4.397 ns; Loc. = LCFF_X34_Y11_N25; Fanout = 2; REG Node = 'system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[11]'
            Info: Total cell delay = 0.537 ns ( 12.21 % )
            Info: Total interconnect delay = 3.860 ns ( 87.79 % )
        Info: - Longest clock path from clock "altera_internal_jtag~TCKUTAP" to source register is 4.424 ns
            Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = JTAG_X1_Y19_N0; Fanout = 1; CLK Node = 'altera_internal_jtag~TCKUTAP'
            Info: 2: + IC(2.874 ns) + CELL(0.000 ns) = 2.874 ns; Loc. = CLKCTRL_G0; Fanout = 191; COMB Node = 'altera_internal_jtag~TCKUTAPclkctrl'
            Info: 3: + IC(1.013 ns) + CELL(0.537 ns) = 4.424 ns; Loc. = LCFF_X35_Y16_N21; Fanout = 15; REG Node = 'sld_hub:sld_hub_inst|jtag_debug_mode_usr1'
            Info: Total cell delay = 0.537 ns ( 12.14 % )
            Info: Total interconnect delay = 3.887 ns ( 87.86 % )
    Info: + Micro clock to output delay of source is 0.250 ns
    Info: + Micro setup delay of destination is -0.036 ns
Info: Minimum slack time is 391 ps for clock "SDRAM_PLL:PLL1|altpll:altpll_component|_clk1" between source register "system_0:u0|jtag_uart_0:the_jtag_uart_0|jtag_uart_0_scfifo_w:the_jtag_uart_0_scfifo_w|scfifo:wfifo|scfifo_1n21:auto_generated|a_dpfifo_8t21:dpfifo|a_fefifo_7cf:fifo_state|b_non_empty" and destination register "system_0:u0|jtag_uart_0:the_jtag_uart_0|jtag_uart_0_scfifo_w:the_jtag_uart_0_scfifo_w|scfifo:wfifo|scfifo_1n21:auto_generated|a_dpfifo_8t21:dpfifo|a_fefifo_7cf:fifo_state|b_non_empty"
    Info: + Shortest register to register delay is 0.407 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X29_Y13_N5; Fanout = 3; REG Node = 'system_0:u0|jtag_uart_0:the_jtag_uart_0|jtag_uart_0_scfifo_w:the_jtag_uart_0_scfifo_w|scfifo:wfifo|scfifo_1n21:auto_generated|a_dpfifo_8t21:dpfifo|a_fefifo_7cf:fifo_state|b_non_empty'
        Info: 2: + IC(0.000 ns) + CELL(0.323 ns) = 0.323 ns; Loc. = LCCOMB_X29_Y13_N4; Fanout = 1; COMB Node = 'system_0:u0|jtag_uart_0:the_jtag_uart_0|jtag_uart_0_scfifo_w:the_jtag_uart_0_scfifo_w|scfifo:wfifo|scfifo_1n21:auto_generated|a_dpfifo_8t21:dpfifo|a_fefifo_7cf:fifo_state|b_non_empty~143'
        Info: 3: + IC(0.000 ns) + CELL(0.084 ns) = 0.407 ns; Loc. = LCFF_X29_Y13_N5; Fanout = 3; REG Node = 'system_0:u0|jtag_uart_0:the_jtag_uart_0|jtag_uart_0_scfifo_w:the_jtag_uart_0_scfifo_w|scfifo:wfifo|scfifo_1n21:auto_generated|a_dpfifo_8t21:dpfifo|a_fefifo_7cf:fifo_state|b_non_empty'
        Info: Total cell delay = 0.407 ns ( 100.00 % )
    Info: - Smallest register to register requirement is 0.016 ns
        Info: + Hold relationship between source and destination is 0.000 ns
            Info: + Latch edge is -2.358 ns
                Info: Clock period of Destination clock "SDRAM_PLL:PLL1|altpll:altpll_component|_clk1" is 10.000 ns with  offset of -2.358 ns and duty cycle of 50
                Info: Multicycle Setup factor for Destination register is 1
                Info: Multicycle Hold factor for Destination register is 1
            Info: - Launch edge is -2.358 ns
                Info: Clock period of Source clock "SDRAM_PLL:PLL1|altpll:altpll_component|_clk1" is 10.000 ns with  offset of -2.358 ns and duty cycle of 50
                Info: Multicycle Setup factor for Source register is 1
                Info: Multicycle Hold factor for Source register is 1
        Info: + Smallest clock skew is 0.000 ns
            Info: + Longest clock path from clock "SDRAM_PLL:PLL1|altpll:altpll_component|_clk1" to destination register is 2.655 ns
                Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_1; Fanout = 1; CLK Node = 'SDRAM_PLL:PLL1|altpll:altpll_component|_clk1'
                Info: 2: + IC(1.091 ns) + CELL(0.000 ns) = 1.091 ns; Loc. = CLKCTRL_G3; Fanout = 3158; COMB Node = 'SDRAM_PLL:PLL1|altpll:altpll_component|_clk1~clkctrl'
                Info: 3: + IC(1.027 ns) + CELL(0.537 ns) = 2.655 ns; Loc. = LCFF_X29_Y13_N5; Fanout = 3; REG Node = 'system_0:u0|jtag_uart_0:the_jtag_uart_0|jtag_uart_0_scfifo_w:the_jtag_uart_0_scfifo_w|scfifo:wfifo|scfifo_1n21:auto_generated|a_dpfifo_8t21:dpfifo|a_fefifo_7cf:fifo_state|b_non_empty'
                Info: Total cell delay = 0.537 ns ( 20.23 % )
                Info: Total interconnect delay = 2.118 ns ( 79.77 % )
            Info: - Shortest clock path from clock "SDRAM_PLL:PLL1|altpll:altpll_component|_clk1" to source register is 2.655 ns
                Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_1; Fanout = 1; CLK Node = 'SDRAM_PLL:PLL1|altpll:altpll_component|_clk1'
                Info: 2: + IC(1.091 ns) + CELL(0.000 ns) = 1.091 ns; Loc. = CLKCTRL_G3; Fanout = 3158; COMB Node = 'SDRAM_PLL:PLL1|altpll:altpll_component|_clk1~clkctrl'
                Info: 3: + IC(1.027 ns) + CELL(0.537 ns) = 2.655 ns; Loc. = LCFF_X29_Y13_N5; Fanout = 3; REG Node = 'system_0:u0|jtag_uart_0:the_jtag_uart_0|jtag_uart_0_scfifo_w:the_jtag_uart_0_scfifo_w|scfifo:wfifo|scfifo_1n21:auto_generated|a_dpfifo_8t21:dpfifo|a_fefifo_7cf:fifo_state|b_non_empty'
                Info: Total cell delay = 0.537 ns ( 20.23 % )
                Info: Total interconnect delay = 2.118 ns ( 79.77 % )
        Info: - Micro clock to output delay of source is 0.250 ns
        Info: + Micro hold delay of destination is 0.266 ns
Info: Minimum slack time is 391 ps for clock "CLOCK_50" between source register "system_0:u0|sdram_0:the_sdram_0|i_cmd[3]" and destination register "system_0:u0|sdram_0:the_sdram_0|i_cmd[3]"
    Info: + Shortest register to register delay is 0.407 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X3_Y7_N11; Fanout = 2; REG Node = 'system_0:u0|sdram_0:the_sdram_0|i_cmd[3]'
        Info: 2: + IC(0.000 ns) + CELL(0.323 ns) = 0.323 ns; Loc. = LCCOMB_X3_Y7_N10; Fanout = 1; COMB Node = 'system_0:u0|sdram_0:the_sdram_0|Selector0~8'
        Info: 3: + IC(0.000 ns) + CELL(0.084 ns) = 0.407 ns; Loc. = LCFF_X3_Y7_N11; Fanout = 2; REG Node = 'system_0:u0|sdram_0:the_sdram_0|i_cmd[3]'
        Info: Total cell delay = 0.407 ns ( 100.00 % )
    Info: - Smallest register to register requirement is 0.016 ns
        Info: + Hold relationship between source and destination is 0.000 ns
            Info: + Latch edge is 0.000 ns
                Info: Clock period of Destination clock "CLOCK_50" is 20.000 ns with  offset of 0.000 ns and duty cycle of 50
                Info: Multicycle Setup factor for Destination register is 1
                Info: Multicycle Hold factor for Destination register is 1
            Info: - Launch edge is 0.000 ns
                Info: Clock period of Source clock "CLOCK_50" is 20.000 ns with  offset of 0.000 ns and duty cycle of 50
                Info: Multicycle Setup factor for Source register is 1
                Info: Multicycle Hold factor for Source register is 1
        Info: + Smallest clock skew is 0.000 ns
            Info: + Longest clock path from clock "CLOCK_50" to destination register is 2.672 ns
                Info: 1: + IC(0.000 ns) + CELL(0.999 ns) = 0.999 ns; Loc. = PIN_N2; Fanout = 3; CLK Node = 'CLOCK_50'
                Info: 2: + IC(0.118 ns) + CELL(0.000 ns) = 1.117 ns; Loc. = CLKCTRL_G2; Fanout = 487; COMB Node = 'CLOCK_50~clkctrl'
                Info: 3: + IC(1.018 ns) + CELL(0.537 ns) = 2.672 ns; Loc. = LCFF_X3_Y7_N11; Fanout = 2; REG Node = 'system_0:u0|sdram_0:the_sdram_0|i_cmd[3]'
                Info: Total cell delay = 1.536 ns ( 57.49 % )
                Info: Total interconnect delay = 1.136 ns ( 42.51 % )
            Info: - Shortest clock path from clock "CLOCK_50" to source register is 2.672 ns
                Info: 1: + IC(0.000 ns) + CELL(0.999 ns) = 0.999 ns; Loc. = PIN_N2; Fanout = 3; CLK Node = 'CLOCK_50'
                Info: 2: + IC(0.118 ns) + CELL(0.000 ns) = 1.117 ns; Loc. = CLKCTRL_G2; Fanout = 487; COMB Node = 'CLOCK_50~clkctrl'
                Info: 3: + IC(1.018 ns) + CELL(0.537 ns) = 2.672 ns; Loc. = LCFF_X3_Y7_N11; Fanout = 2; REG Node = 'system_0:u0|sdram_0:the_sdram_0|i_cmd[3]'
                Info: Total cell delay = 1.536 ns ( 57.49 % )
                Info: Total interconnect delay = 1.136 ns ( 42.51 % )
        Info: - Micro clock to output delay of source is 0.250 ns
        Info: + Micro hold delay of destination is 0.266 ns
Info: tsu for register "system_0:u0|cpu_0:the_cpu_0|d_readdata_d1[21]" (data pin = "SRAM_DQ[5]", clock pin = "CLOCK_50") is 8.985 ns
    Info: + Longest pin to register delay is 9.312 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PIN_AB10; Fanout = 1; PIN Node = 'SRAM_DQ[5]'
        Info: 2: + IC(0.000 ns) + CELL(0.820 ns) = 0.820 ns; Loc. = IOC_X14_Y0_N1; Fanout = 4; COMB Node = 'SRAM_DQ[5]~10'
        Info: 3: + IC(6.087 ns) + CELL(0.419 ns) = 7.326 ns; Loc. = LCCOMB_X23_Y9_N6; Fanout = 1; COMB Node = 'system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|cpu_0_data_master_readdata[21]~3166'
        Info: 4: + IC(0.801 ns) + CELL(0.437 ns) = 8.564 ns; Loc. = LCCOMB_X23_Y13_N30; Fanout = 1; COMB Node = 'system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|cpu_0_data_master_readdata[21]~3167'
        Info: 5: + IC(0.244 ns) + CELL(0.420 ns) = 9.228 ns; Loc. = LCCOMB_X23_Y13_N22; Fanout = 1; COMB Node = 'system_0:u0|cpu_0_data_master_arbitrator:the_cpu_0_data_master|cpu_0_data_master_readdata[21]~3168'
        Info: 6: + IC(0.000 ns) + CELL(0.084 ns) = 9.312 ns; Loc. = LCFF_X23_Y13_N23; Fanout = 3; REG Node = 'system_0:u0|cpu_0:the_cpu_0|d_readdata_d1[21]'
        Info: Total cell delay = 2.180 ns ( 23.41 % )
        Info: Total interconnect delay = 7.132 ns ( 76.59 % )
    Info: + Micro setup delay of destination is -0.036 ns
    Info: - Offset between input clock "CLOCK_50" and output clock "SDRAM_PLL:PLL1|altpll:altpll_component|_clk1" is -2.358 ns
    Info: - Shortest clock path from clock "SDRAM_PLL:PLL1|altpll:altpll_component|_clk1" to destination register is 2.649 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_1; Fanout = 1; CLK Node = 'SDRAM_PLL:PLL1|altpll:altpll_component|_clk1'
        Info: 2: + IC(1.091 ns) + CELL(0.000 ns) = 1.091 ns; Loc. = CLKCTRL_G3; Fanout = 3158; COMB Node = 'SDRAM_PLL:PLL1|altpll:altpll_component|_clk1~clkctrl'
        Info: 3: + IC(1.021 ns) + CELL(0.537 ns) = 2.649 ns; Loc. = LCFF_X23_Y13_N23; Fanout = 3; REG Node = 'system_0:u0|cpu_0:the_cpu_0|d_readdata_d1[21]'
        Info: Total cell delay = 0.537 ns ( 20.27 % )
        Info: Total interconnect delay = 2.112 ns ( 79.73 % )
Info: tco from clock "CLOCK_50" to destination pin "I2C_SCLK" through register "I2C_AV_Config:u1|I2C_Controller:u0|SD_COUNTER[1]" is 15.302 ns
    Info: + Longest clock path from clock "CLOCK_50" to source register is 5.087 ns
        Info: 1: + IC(0.000 ns) + CELL(0.999 ns) = 0.999 ns; Loc. = PIN_N2; Fanout = 3; CLK Node = 'CLOCK_50'
        Info: 2: + IC(0.118 ns) + CELL(0.000 ns) = 1.117 ns; Loc. = CLKCTRL_G2; Fanout = 487; COMB Node = 'CLOCK_50~clkctrl'
        Info: 3: + IC(1.036 ns) + CELL(0.787 ns) = 2.940 ns; Loc. = LCFF_X64_Y19_N15; Fanout = 3; REG Node = 'I2C_AV_Config:u1|mI2C_CTRL_CLK'
        Info: 4: + IC(0.589 ns) + CELL(0.000 ns) = 3.529 ns; Loc. = CLKCTRL_G7; Fanout = 46; COMB Node = 'I2C_AV_Config:u1|mI2C_CTRL_CLK~clkctrl'
        Info: 5: + IC(1.021 ns) + CELL(0.537 ns) = 5.087 ns; Loc. = LCFF_X14_Y6_N11; Fanout = 17; REG Node = 'I2C_AV_Config:u1|I2C_Controller:u0|SD_COUNTER[1]'
        Info: Total cell delay = 2.323 ns ( 45.67 % )
        Info: Total interconnect delay = 2.764 ns ( 54.33 % )
    Info: + Micro clock to output delay of source is 0.250 ns
    Info: + Longest register to pin delay is 9.965 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X14_Y6_N11; Fanout = 17; REG Node = 'I2C_AV_Config:u1|I2C_Controller:u0|SD_COUNTER[1]'
        Info: 2: + IC(1.412 ns) + CELL(0.438 ns) = 1.850 ns; Loc. = LCCOMB_X14_Y5_N18; Fanout = 1; COMB Node = 'I2C_AV_Config:u1|I2C_Controller:u0|I2C_SCLK~253'
        Info: 3: + IC(0.458 ns) + CELL(0.438 ns) = 2.746 ns; Loc. = LCCOMB_X14_Y5_N12; Fanout = 1; COMB Node = 'I2C_AV_Config:u1|I2C_Controller:u0|I2C_SCLK~254'
        Info: 4: + IC(0.732 ns) + CELL(0.150 ns) = 3.628 ns; Loc. = LCCOMB_X14_Y7_N28; Fanout = 1; COMB Node = 'I2C_AV_Config:u1|I2C_Controller:u0|I2C_SCLK~255'
        Info: 5: + IC(3.529 ns) + CELL(2.808 ns) = 9.965 ns; Loc. = PIN_A6; Fanout = 0; PIN Node = 'I2C_SCLK'
        Info: Total cell delay = 3.834 ns ( 38.47 % )
        Info: Total interconnect delay = 6.131 ns ( 61.53 % )
Info: Longest tpd from source pin "AUD_DACLRCK" to destination pin "AUD_ADCLRCK" is 8.809 ns
    Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PIN_C6; Fanout = 1; PIN Node = 'AUD_DACLRCK'
    Info: 2: + IC(0.000 ns) + CELL(0.860 ns) = 0.860 ns; Loc. = IOC_X1_Y36_N2; Fanout = 1; COMB Node = 'AUD_DACLRCK~0'
    Info: 3: + IC(5.141 ns) + CELL(2.808 ns) = 8.809 ns; Loc. = PIN_C5; Fanout = 0; PIN Node = 'AUD_ADCLRCK'
    Info: Total cell delay = 3.668 ns ( 41.64 % )
    Info: Total interconnect delay = 5.141 ns ( 58.36 % )
Info: th for register "sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|tms_cnt[0]" (data pin = "altera_internal_jtag~TMSUTAP", clock pin = "altera_internal_jtag~TCKUTAP") is 1.643 ns
    Info: + Longest clock path from clock "altera_internal_jtag~TCKUTAP" to destination register is 4.452 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = JTAG_X1_Y19_N0; Fanout = 1; CLK Node = 'altera_internal_jtag~TCKUTAP'
        Info: 2: + IC(2.874 ns) + CELL(0.000 ns) = 2.874 ns; Loc. = CLKCTRL_G0; Fanout = 191; COMB Node = 'altera_internal_jtag~TCKUTAPclkctrl'
        Info: 3: + IC(1.041 ns) + CELL(0.537 ns) = 4.452 ns; Loc. = LCFF_X32_Y16_N3; Fanout = 4; REG Node = 'sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|tms_cnt[0]'
        Info: Total cell delay = 0.537 ns ( 12.06 % )
        Info: Total interconnect delay = 3.915 ns ( 87.94 % )
    Info: + Micro hold delay of destination is 0.266 ns
    Info: - Shortest pin to register delay is 3.075 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = JTAG_X1_Y19_N0; Fanout = 22; PIN Node = 'altera_internal_jtag~TMSUTAP'
        Info: 2: + IC(2.841 ns) + CELL(0.150 ns) = 2.991 ns; Loc. = LCCOMB_X32_Y16_N2; Fanout = 1; COMB Node = 'sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|tms_cnt~0'
        Info: 3: + IC(0.000 ns) + CELL(0.084 ns) = 3.075 ns; Loc. = LCFF_X32_Y16_N3; Fanout = 4; REG Node = 'sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|tms_cnt[0]'
        Info: Total cell delay = 0.234 ns ( 7.61 % )
        Info: Total interconnect delay = 2.841 ns ( 92.39 % )
Info: All timing requirements were met. See Report window for more details.
Warning: Found invalid timing assignments -- see Ignored Timing Assignments report for details
Info: Quartus II Timing Analyzer was successful. 0 errors, 8 warnings
    Info: Processing ended: Sun Apr 08 00:55:42 2007
    Info: Elapsed time: 00:00:10


