CSCE 230: Computer Organization, Fall 2009
Department
of Computer Science and Engineering
University
of Nebraska-Lincoln
9:30-10:20 PM, MWF, Avery
Hall, Room 119
|
| Quick Links: | Web Handin: (for Lab, HW, etc.) | 230L Web Page | 230 Class Wiki | Scores Distribution | UNL BlackBoard |
Phone: 472-5003
Email:
seth at cse dot unl dot edu
Office Hours: @AvH 359, 1:30-2:30 pm, M,W,F (send email to see
me, otherwise)
Important: The fourth edition is a substantial revision of the third edition therefore beware that buying the third edition will be to your disadvantage. The second and earlier editions are even more outdated and not recommended. Here is a link to the Companion Website for the textbook.
| Week of | Monday | Wednesday | Friday | |||
| Topics |
Assignment | Topics |
Assignment | Topics | Assignment | |
| 8/24 | First-day administrivia: Syllabus, etc. | Read Sections 1.1-1.3 and try Exercises 1.1 and 1.2 on your own | Computer Abstraction and Technology-1 | Read Sections 1.4-16 and try some of exercises 1.3-1.10 on your own | Computer Abstraction and Technology-2, Example Double-Elimination Tournament (related to prereq sample problem) | Read Section 1.7-1.10 and try
some of exercises
1.11-1.16 on your own. Prerequisite Test - Format TBA |
| 8/31 | Computer Abstraction and Technology - 3, Example: Why geometric mean? | Homework 1 (due 9/9/09, before class) | Logic Design Introduction (Appendix C) | Read pp. C-3 to C-10, C-17 to C-18 | Quiz 1 on logic design Logic Design (Appendix C): Performance measures (literal cost and delay), iterative-array design of adder for n-but unsigned binary numbers |
Read pp. C-18 to C-20, Sec C.5 (pp. C-26 to C-33) Do practice problem on structured design I will be posting online (Maple TA) prerequisite test on BlackBoard later today |
| 9/7 | Labor Day | Two's-complement
representation Logic Design (Appendix C) Bit-sliced ALU design |
Review Section 2.4, pp. 87-94, Section C.5 (C-26 to C-33) Homework 2 (due 9/16/09, before class) |
Boolean algebra and applications | Read pp. C-6, C-7 | |
| 9/14 | Sequential Logic: SR and D Latches, Latch Registers | Read Sec C.8, pp. C-50 to C-53 | Setup and hold times, Metastability, Read/Write registers, | Sec. C.8, up to p. C-54 to C-56; Sec C.9, pp. C-58 to
C-65. Homework 3 (due 9/23/09, before class) |
Registers, Register Files, and RAM | Read pp.C-54 to C-56; Sec C.9, pp. C-58 to C-65. |
| 9/21 | Registers, Register Files, and RAM (contd.) | Registers, Register Files, and RAM (contd.) | Test 1 on Chapter 1 and Apps. C & D | |||
| 9/28 | Introduction to hardware algorithms: Serial Adder | Sec C.10 | Hardware algorithms for arithmetic: Serial adder and multiplier | Read Sec 3.3, pp. 230-234 Homework 4 (due 10/7/09, before class) |
Hardware
algorithms for arithmetic (updated) Completion of RTL design method, General procedure for designing finite state machines; Examples of using Espresso, the logic minimization tool (see the man page) |
|
| 10/5 | Intro to MIPS (Ch. 2) | Read Ch. 2, pp. 74-82 | Intro to MIPS assembly lComponents of assembly language, assembly and linking of program modules | up to Section 2.3 | Intro to MIPS assembly language (updated overheads), MIPS Green Card | Sections 2.4-2.5 |
| 10/12 | Intro to MIPS (lw, sw) | Intro to MIPS: branches; Read logical operations (Sec 2.6 on your own). | Read Sec 2.6 and 2.7 Homework 5 (updated 10/16) (due 10/21/09, before class) |
MIPS Procedures, leaf procedures, register-use and call conventions | Read Sec. 2.8 | |
| 10/19 | Fall Break | Recursive procedures, stack and activation frame | Read Sec. 2.8 | Midterm Test | ||
| 10/26 | Process synchronization, Intro to MIPS assembly language (updated overheads), Translating and Starting a Program, Putting it altogether | Read Sec. 2.11-2.13 | Processor Design Introduction (Ch. 4) | Read Secs. 4.1-4.4 Homework 6 (due 11/5/09, before class) |
Processor Design - Single cycle datapath | |
| 11/2 | Processor Design: Singl-cycle datapath +control, In-class exercise | In-class exercise (contd), | Introduction to Pipelining | Read Section 4.5 | ||
| 11/9 | Introduction to Memory Hierarchy & Cache | Homework 7 (Ch 4: Processor Design) | ||||
| 11/16 | ||||||
| 11/23 | Homework 8 (Ch5: Memory Hierarchy) | Thanksgiving Break | ||||
| 11/30 | ||||||
| 12/7 | ||||||
| FINAL EXAM: Tuesday, December 15, 10 am - 12 pm | ||||||
Last updated August 4, 2009