CSCE930: Advanced Computer Architecture

 


Class Time: 9:30A.M. – 10:45A.M., T.Th.
Class Location: 347 Avery Hall

Office hours: 11:00 A.M. – 11:50 A.M., T.Th.
Instructor: Dr. Hong Jiang;

Office Location: 217 Schorr Center,

472-6747; jiang@cse.unl.edu

 

 

Syllabus   Course Schedule  Academic Integrity Policy Late Policy  Important Resources  Useful Info  Project Teams   Homework  Grade Status

Reference Text and Materials:

1.      David E. Culler and Jaswinder Pal Singh, Parallel Computer Architecture – A Hardware/Software Approach, Morgan Kaufmann Publishers Inc., 1999

2.      John L. Hennessy and David A. Patterson, Computer Architecture -- A Quantitative Approach, 4th Edition, Morgan Kaufmann Publishers Inc., 2007

3.      John P. Shen and Mikko H. Lipasti, Modern Processor Design - Fundamentals of Superscalar Processors, McGraw-Hill Higher Education, 2005. (Link to the book on Amazon.com and at the publisher's website)

4.      Jean-Loup Baer, Microprocessor Architecture – From Simple Pipelines to Chip Multiprocessors, Cambridge University Press, 2009

5.      Selected latest literature on computer architecture (e.g., papers from such conferences top-tier as ISCA, MICRO, HPCA, PACT, ICS, etc.) and storage systems technology (e.g., papers from such top-tier conferences as FAST, USENIX-ATC, OSDI, SOSP, SC, etc.)

 

Useful Info: A very good source of information about the state of computer architecture, plus many reference materials on oral and written communication exist:

 

Late Policy:  Late work is penalized 20% per day. Once solutions are published, late work cannot be accepted for credit.

 

Academic Integrity Policy: While collaboration on homework is permitted, blatant copying will not be tolerated. Violators, if caught, will subject to penalties ranging from a zero for the homework assignment in question to an F grade for the course, depending on the severity of the violation.

·         The CSE-UNL Academic Integrity Policy

 

Important Resources:

 

Tentative Course Schedule:

Date

Topics

Reading Assignment & References

Assignment Date

Due Date

8/24

Course Syllabus and Introduction

Chapters 1 & 2 of ref text [1], Chapters 3 & 4 of ref text [2], and others

 

 

8/26

Introduction and motivations: Tech. Trends

Chapters 1 & 2 of ref text [1], Chapters 3 & 4 of ref text [2], and others

 

8/31

Introduction and motivations: Tech Trends

Chapters 1 & 2 of ref text [1], Chapters 3 & 4 of ref text [2], and others

 

 

9/2

Introduction and motivations: Architectural Convergence

Chapters 1 & 2 of ref text [1], Chapters 3 & 4 of ref text [2], and others

9/7

Introduction and motivations: Architectural Convergence

Chapters 1 & 2 of ref text [1], Chapters 3 & 4 of ref text [2], and others

 

9/9

Introduction and motivations: Programming Models

Chapters 1 & 2 of ref text [1], Chapters 3 & 4 of ref text [2], and others

 

 

9/14

Introduction and motivations: Programming Models

Chapters 1 & 2 of ref text [1], Chapters 3 & 4 of ref text [2], and others

 

 

9/16

CMPs & CMP Cache Simulators

 

9/21

Introduction and motivations: Programming Models

Chapters 1 & 2 of ref text [1], Chapters 3 & 4 of ref text [2], and others

 

 

9/23

Introduction and motivations: Programming Models

Chapters 1 & 2 of ref text [1], Chapters 3 & 4 of ref text [2], and others

Homework I

 

9/28

File Systems Basics, and Hadoop File Systems

 

9/30

Hadoop File Systems, and MapReduce Programming Model

 

10/5

Seymour Cray's (a.k.a. Father of Supercomputing) Only Surviving Talk: "Cray-1 Introduction" (1976, LANL)

 

Homework I

10/7

Introduction and motivations: Programming Models

Chapters 1 & 2 of ref text [1], Chapters 3 & 4 of ref text [2], and others

 

10/12

Introduction and motivations: Programming Models

Shared Memory Multiprocessors

Chapters  2 & 5 of ref text [1], Chapters 3 & 4 of ref text [2], and others

10/14

Shared Memory Multiprocessors

Chapters   5 of ref text [1], Chapters 3 & 4 of ref text [2], and others

Homework II

 

10/21

Shared Memory Multiprocessors

Chapters  5 of ref text [1], Chapters 3 & 4 of ref text [2], and others

 

10/26

Shared Memory Multiprocessors

Chapters  5 of ref text [1], Chapters 3 & 4 of ref text [2], and others

 

Homework III

Homework II

10/28

Shared Memory Multiprocessors

Chapters  5 of ref text [1], Chapters 3 & 4 of ref text [2], and others

11/2

Scalable Cache-Coherent Multiprocessors

Chapters  7 & 8 of ref text [1], Chapters 3 & 4 of ref text [2], and others

Homework III

11/4

Scalable Cache-Coherent Multiprocessors

Chapters  7 & 8 of ref text [1], Chapters 3 & 4 of ref text [2], and others

 

 

11/9

Scalable Cache-Coherent Multiprocessors

Chapters  7 & 8 of ref text [1], Chapters 3 & 4 of ref text [2], and others

 

11/11

Scalable Cache-Coherent Multiprocessors

Chapters  7 & 8 of ref text [1], Chapters 3 & 4 of ref text [2], and others

 

11/16

Midterm Exam

 

11/18

Scalable Cache-Coherent Multiprocessors

Chapters  7 & 8 of ref text [1], Chapters 3 & 4 of ref text [2], and others

 

 

11/30

Scalable Interconnection Networks

Chapter  10 of ref text [1], and others

 

12/2

Scalable Interconnection Networks

Chapter  10 of ref text [1], and others

 

12/7

Project Preparations

 

 

 

12/9

Project Preparations

 

 

 

12/13

Project Preparation Presentations (10:00am-12:00noon)

 

 

 

Project Teams:

Team Name

Names of Team Members

Team 1:

John Tooker, Charles Lucas, and David Anthony 

Team 2:

Lei Xu, Jian Hue, and Stephen Mkandawire

Team 3:

Guangdong Liu, Kartik Vedalaveni, and Dongyuan Zhan

Team 4:

Ziyang Lin, Xiaoyu Sun, and Pingyu Zhang

Team 5:

Saibal Roy, Shakthi Bachala, and Bakhtiar Kasi

Team 6:

Chen He and Peng Du

 

Project Reference and Reading List


Summary of Homework:

1. Assignment #1: Project Ideas, due October 5, 2010

2. Assignment #2: Project Proposal, due October 26, 2010

3. Assignment #3: Problem solving exercises, due November 2, 2010

4. Assignment #4: